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ONT传输会聚(TC)层上行组帧中基于IP核的ATM信元存储方案及其FPGA实现

Design of ATM Cell Memory Based on IP Core and It's FPGA Implementation in Upstream-framing of ONT TC Layer
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摘要 IP核可重用设计方法是未来大规模集成电路的主流设计方法。本文论述了在设计光网络终端ONT传输会聚(TC)层上行组帧中,一种将IP核模块与VHDL语言描述相结合的ATM信元存储方案,并用FPGA予以实现,得出IP核设计方法的优越性。 Reusable design method of IP core is the main method in designing large scale integrated circuits.In this paper, a storage method of ATM cell is described using the combination of IP core module and VHDL language description in designing upstream-framing of ONT TC layer. The ATM cell memory is implemented with FPGA and the superiority of design method based on IP core is concluded.
出处 《光电子技术与信息》 2003年第6期34-37,共4页 Optoelectronic Technology & Information
基金 江苏省高技术资助项目(BG20001046)
关键词 IP核可重用设计方法 TC层上行组帧 ATM信元存储 FPGA实现 reusable design method of IP core upstream-framing of TC layer ATM cell memory FPGA implementation
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  • 1[1]W. Remaklus, On-chii bus structure for custom core logic designs, Proc. of the Wescon, Anaheim,Calif., 1998, 7-14.
  • 2[2]D. Wingard, A. Kurosawa, Integration architecture for system-on-a-chip design, Proc. of the IEEE Custom Integrated Circuits Conference, Santa Clara, California, 1998, 85-88.
  • 3[3]VSI Alliance, www. vsi. org
  • 4[4]Motorola Semiconductor Reuse Standards, http://www.motorola.com/semiconductors/srs
  • 5徐小田.快速发展的中国集成电路市场与产业[J].世界电子元器件,2001(7):5-8. 被引量:3

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