摘要
介绍了循环码编译码系统的特点。以一个(15,6)循环码为例,使用硬件描述语言VHDL对该系统进行了设计,并使用FPGA对描述电路进行了综合,得到了该系统的顶层电路,最后下载到PLD芯片上。
The characteristic of cyclic coding and decoding system were discussed. With a (15,6) cyclic code example, the system with VHDL and FPGA was designed and synthesized. The top level circuit was produced, and written to PLD. The result shows that the system was better than the traditional one on hardware cost, capability and reliability etc.
出处
《青岛大学学报(自然科学版)》
CAS
2003年第4期72-75,84,共5页
Journal of Qingdao University(Natural Science Edition)