模拟电路拓扑可测性设计与分析

Design and Analiysis of the Topological Testability of Analog Circuits

本文根据Huang Z F等提出的模拟电路故障拓朴可测条件,建立了拓扑可测性设计问题的图论模型并给出了一种简便算法,讨论了可测性分析的方法并证明了对使用撕裂法处理大网络十分有用的主子网可测性关系定理。

According to the topological condition on the fault testability of analog circuits given by Huang Z F etc., this paper estab- lishes a model of testability design in graph theory and pre- sents a simple algorithm, discusses the method of testability analysis and proves a main-sub network testability relation theorem which is very useful for applying the decomposition method to handle large networks.