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Investigation and active suppression of self-heating induced degradation in amorphous InGaZnO thin film transistors

Investigation and active suppression of self-heating induced degradation in amorphous InGaZnO thin film transistors
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摘要 Self-heating effect in amorphous InGaZnO thin-film transistors remains a critical issue that degrades device performance and stability, hindering their wider applications. In this work, pulsed current–voltage analysis has been applied to explore the physics origin of self-heating induced degradation, where Joule heat is shortly accumulated by drain current and dissipated in repeated time cycles as a function of gate bias. Enhanced positive threshold voltage shift is observed at reduced heat dissipation time, higher drain current, and increased gate width. A physical picture of Joule heating assisted charge trapping process has been proposed and then verified with pulsed negative gate bias stressing scheme, which could evidently counteract the self-heating effect through the electric-field assisted detrapping process. As a result, this pulsed gate bias scheme with negative quiescent voltage could be used as a possible way to actively suppress self-heating related device degradation. Self-heating effect in amorphous InGaZnO thin-film transistors remains a critical issue that degrades device performance and stability, hindering their wider applications. In this work, pulsed current–voltage analysis has been applied to explore the physics origin of self-heating induced degradation, where Joule heat is shortly accumulated by drain current and dissipated in repeated time cycles as a function of gate bias. Enhanced positive threshold voltage shift is observed at reduced heat dissipation time, higher drain current, and increased gate width. A physical picture of Joule heating assisted charge trapping process has been proposed and then verified with pulsed negative gate bias stressing scheme, which could evidently counteract the self-heating effect through the electric-field assisted detrapping process. As a result, this pulsed gate bias scheme with negative quiescent voltage could be used as a possible way to actively suppress self-heating related device degradation.
作者 Dong Zhang Chenfei Wu Weizong Xu Fangfang Ren Dong Zhou Peng Yu Rong Zhang Youdou Zheng Hai Lu 张东;武辰飞;徐尉宗;任芳芳;周东;于芃;张荣;郑有炓;陆海(School of Electronic Science and Engineering Jiangsu Provincial Key Laboratory of Advanced Photonic and Electronic MaterialsNanjing University;State Grid Shandong Electric Power Research Institute)
出处 《Chinese Physics B》 SCIE EI CAS CSCD 2019年第1期575-579,共5页 中国物理B(英文版)
基金 Project supported by the National Key R&D Program of China(Grant No.2016YFB0400100) the National Natural Science Foundation of China(Grant No.91850112) the Natural Science Foundation of Jiangsu Province,China(Grant No.BK20161401) the Priority Academic Program Development of Jiangsu Higher Education Institutions,China the Science and Technology Project of State Grid Corporation of China(Grant No.SGSDDK00KJJS1600071) the Fundamental Research Funds for the Central Universities,China(Grant No.14380098)
关键词 AMORPHOUS INGAZNO thin-film TRANSISTOR SELF-HEATING effect threshold voltage SHIFT pulsed negative gate BIAS amorphous InGaZnO thin-film transistor self-heating effect threshold voltage shift pulsed negative gate bias
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