摘要
随着卷积神经网络的广泛应用,相关的卷积加速器应运而生,但现有卷积运算结构都是专用设计,满足不了弹载人工智能对实时性与低功耗的要求。针对此问题,充分考虑专用集成电路实现后的高能效性和现场可编程逻辑门阵列的灵活可配置性,研究动态可重构、分时复用、脉冲阵列与并行流水等结构,设计一种了用于弹载人工智能的可重构的卷积加速器,有效的弥补系统硬件资源的有限性,并提高了系统的并行性,满足未来智能武器装备对处理性能的需求。
With the widespread application of convolutional neural networks,the related convolution accelerators are emerged,but the computational structure of the existing convolutional neural networks dedicatedly designed cannot meet the requirements of real-time and low power consumption of the missileborne artificial intelligence.As for the issue,the structure of dynamic reconfigurable,time-multiplexed,pulse array and parallel pipeline is studied fully combined the high-energy-efficiency ASIC and the flexible-configurability FPGA.A reconfigurable convolution accelerator for missile-borne artificial intelligence is realized to compensate the limited hardware resources of the system effectively and improve the parallelism,which meeting the demand for processing performance in future smart weaponry.
作者
王镇
汪健
张磊
王世和
Wang Zhen;Wang Jian;Zhang Lei;Wang Shihe(East China Institute of Photo-electron IC,Suzhou 215163,China)
出处
《战术导弹技术》
北大核心
2019年第5期97-102,共6页
Tactical Missile Technology
关键词
卷积神经网络
弹载人工智能
可重构卷积加速器
集成电路
convolutional neural network
missile artificial intelligence
reconfigurable convolution accelerator
integrated circuit