摘要
This work demonstrates that the ΣΔ modulator with a low oversampling ratio is a viable option for the high-resolution digitization in a low-voltage environment.Low power dissipation is achieved by designing a low-OSR modulator based on differential cascade architecture,while large signal swing maintained to achieve a high dynamic range in the low-voltage environment.Operating from a voltage supply of 1.8V,the sixth-order cascade modulator at a sampling frequency of 4-MHz with an OSR of 24 achieves a dynamic range of 81dB for a 80-kHz test signal,while dissipating only 5mW.
采用 2 2 2级联全差分结构和低电压、高线性度的电路设计实现了高动态范围、低过采样率的 ΣΔ 调制器 .在1.8V工作电压 ,4 MHz采样频率以及 80 k Hz输入信号的条件下 ,该调制器能够达到 81d B的动态范围 ,功耗仅为5 m W.
基金
上海应用材料研究与发展基金资助项目 ( No.0 10 2 )~~
