嵌入式系统描述与验证环境的实现

Implementation of Specification and Verification Environment for Embedded System

首先 ,用统一建模语言 (UML)中的状态图描述系统在整个活动周期中所处的不同的状态 ,活动图表示状态图中每个进程的功能 ,对象约束语言 (OCL)描述系统中的约束条件 ;然后 ,用自行开发的软件UML2SC将UML描述的系统转换成SystemC代码 ,以完成系统的模拟验证 ;

Design environment is introduced to specify and verify the functionality and performance of embedded system. First, the state charts diagram of Unified Modeling Language (UML) is used to specify the states of a system in a full active period, and the active diagram is used to depict the functions of every process in one state, the constraint conditions of system are also expressed by Object Constraint Language. Second, in order to execute simulation and verification of a specified system, the UML2SC is developed to convert the system specification of UML into SystemC. Finally, an application example using the above approach is illustrated.