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折叠内插式模/数转换器误差补偿技术研究 被引量：1

Errors Compensation Technique for the Folding and Interpolating Analog-to-Digital Converter
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摘要 分析了高速折叠内插式ADC结构和各种影响ADC性能的因素,基于自动调零技术原理,在前置放大器与折叠放大器之间引入差分对,实现放大器失调电压的补偿。基于补偿技术,实现了8位补偿的折叠内插式ADC,采用Star-Sim对8位补偿ADC进行仿真,仿真结果与典型的8位ADC进行比较,证明了自动调零补偿技术能明显改善折叠内插式ADC的线性误差,也可适合应用于其它高速ADC的误差补偿。 The structure of Folding and Interpolating ADC and factors related to the performance of ADC are analyzed. Based on the basic principle of the Auto-Zero technique, a new folding path with an auxiliary differential pair is added to compensate the offset voltage of amplifier. An 8-bit folding and interpolating ADC using auto-zero compensation technique is presented and simulated by means of Star-Sim program. Compared with the non-compensation ADC, application of the proposed technique can reduce nonlinear errors. This compensation technique is also suitable to the error compensation for other high-speed ADCs.
作者 朱樟明 杨银堂 罗宏伟 刘帘曦 朱磊
机构地区 西安电子科技大学微电子研究所
出处 《电路与系统学报》 CSCD 2004年第1期64-67,共4页 Journal of Circuits and Systems
关键词 折叠 内插 模数转换器 线性误差 补偿 folding interpolating analog-to-digital converter linear error compensation
分类号 TN402 [电子电信—微电子学与固体电子学]
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  • 1[1]GUSTTAVSSON M, CMOS data converters for communications, kluwer academic publishers, 2000.
  • 2[2]PELUSO V, Design of low-voltage low-power CMOS delta-sigma A/D converters, kluwer academic publishers, 1999.
  • 3[4]CHO T, Low-power low-voltage analog-to-digital conversion techniques using pipelined architecures ,UC Berkeley PhD Thesis, 1995.
  • 4[5]ABO A, GRAY P R, A 1.5-V, 10-bit, 14.3-MS/s CMOS pipeline analog-to-digital converter , IEEE J. Solid-State Circuits, vol. 34, no. 5, May 1999.
  • 5[6]CHO T, A 10b 20MS/s 35mW pipeline A/D converter, IEEE J. Solid State Circuits, March 1995.
  • 6[7]YOO J, CHOI K, and TANGEL A, 1-GSPS CMOS flash analog-to-digital converter for system-on-chip applications , in Proc. IEEE Computer Society Workshop on VLSI, April 2001, pp. 123～456.

共引文献6

同被引文献6

  • 1尹韬,朱樟明,杨银堂,郭磊.衬底驱动MOSFET特性分析及超低压运算放大器设计[J].Journal of Semiconductors,2005,26(1):158-162. 被引量：14
  • 2Chen Jiwei, Shi Bingxue. 1V CMOS Current Reference with 50ppm/℃ Temperature Coefficient[J]. IEE Electronics Letters, 2003, 39(2): 209-210.
  • 3Lee C H, Park H J. All-CMOS Temperature Independent Current Reference[J]. IEE Electronics Letters, 1996, 32(14): 1280-1281.
  • 4Doyle J, Lee Y J, Kim Y B. A CMOS Subbandgap Reference Circuit with 1V Power Supply Voltage[J]. IEEE Journal of Solid-State Circuits, 2004, 39(1): 252-255.
  • 5Dehghani R, Atarodi S M. A New Low Voltage Precision CMOS Current Reference with No External Components[J]. IEEE Trans on Circuits and Systems Ⅱ, 2003, 50(12): 928-932.
  • 6Bernardson P. Precision, Temperature and Supply Independent CMOS Current Source with No External Comonents[J]. IEE Electronics Letters, 2002, 38(25): 125-130.

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电路与系统学报
2004年 第1期

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