并行图重写机PGRM及其优化的并行编译器

THE PARALLEL GRAPH REWRITING MACHINE PGRM AND ITS OPTIMIZED PARALLEL COMPILER

本文首先扼要地介绍了并行图重写计算模型,提出了一种新的多相并行图重写执行模型HPGREM及并行抽象机PAM/TGR,在此基础上设计了并行图重写机PGRM的体系结构及其优化的并行编译器.我们的目标是基于现有的商售芯片构造高效的并行图重写执行系统.有效地支持函数语言和逻辑语言的高效实现.并行图重写机PGRM的性能测试表明 PGRM的性能均好于SML,PARLOG,G—machine及<v,G>-machine等并行图重写执行系统.

In this paper, the parallel graph rewriting computational model is introduced firstly, then a new Hybrid Parallel Graph Rewriting Execution Model (HPGREM) and its corresponding parallel abstract machine PAM / TGR are proposed. Furthermore, the architecture of parallel graph rewriting machine and its optimized parallel compier arc designed and implemented on a Transputer Array. Our goal is to construct an efficient execution system of parallel graph rewriting to support the implmcntation of functional and logic languages based on current commercial hardware such as Transputers. The performance statistic has shown that PGRM is better than SML, PARLOG, G-machine, and < v,G > -machine.