摘要
介绍了热载流子效应与电路拓扑结构及器件参数之间的关系,并在此基础上提出了基本逻辑门的一些抗热载流子加固方法。通过可靠性模拟软件验证这些方法,为CMOS数字电路提高抗热载流子能力提供了参考。
Hot-Carrier Effect (HCE) is relevant to device parameter and circuit topology. Some logic gates reliability design methods based on HCE can be obtained by analyzing the relationship between them. These methods are validated with reliability simulation software and are useful for improving the HCE performance of CMOS digital integrate circuit.
出处
《电子产品可靠性与环境试验》
2004年第1期10-14,共5页
Electronic Product Reliability and Environmental Testing
基金
电子元器件可靠性及其应用技术国家重点实验室基金(514330301)
