期刊文献+

一种分析高速时钟网络信号完整性的有效方法 被引量:1

An Efficient Method to Analyze Signal Integrity in High-Speed Clock Circuit
下载PDF
导出
摘要 本文基于有耗传输线模型 ,运用等效源理论首次分析了工作在GHz频率时时钟树电路互连系统对传输信号完整性的影响 ,对时钟树的‘T’型结构引入三端口网络 。 The equivalent source theory based on lossy transmission line model is used to analyze the interconnect effect for propagating signal integrity in clock circuit which is operated at GHz frequency.Simultaneously three port network is brought to the ' T ' structure in clock tree, the result shows this is an efficient method to analyze the signal integrity in clock tree.
出处 《电子学报》 EI CAS CSCD 北大核心 2004年第2期335-337,共3页 Acta Electronica Sinica
基金 国家自然科学基金 (No .60 2 760 4 2 ) 国家 863计划 (No .2 0 0 2ZZ1A1 2 30 )
关键词 互连线 信号完整性 等效源理论 interconnect signal integrity equivalent source theory
  • 相关文献

参考文献5

  • 1[1]J Cong,K S Leung.Optimal wire sizing under Elmore delay model [J].IEEE Trans.on Computer Aided Design of Integrated Circuits and System,1995,14(3):321-336.
  • 2[2]R Gupta,B Tutuianu,L Pileggi.The Elmore delay as a bound for RC trees with generalized input signals [J].IEEE Trans.computer-Aided Design,1997,16(1):95-104.
  • 3[3]Zhou D, Preparrate F P,S M Kang.Interconnection delay in very high-speed VLSI [J].IEEE Transactions on Circuits and System,1991,38(7):779-789.
  • 4[4]Y Eo,W R Eisenstadt.High-speed VLSI interconnect modeling based on S-parameter measurement [J].IEEE Trans.Comp,Hybrids,Manufac.Technol,1993,16(8):555-562.
  • 5[5]K C Gupta.computer-Aided Design of Microwave Circuits [M].Artech,1981.

同被引文献11

引证文献1

二级引证文献15

相关作者

内容加载中请稍等...

相关机构

内容加载中请稍等...

相关主题

内容加载中请稍等...

浏览历史

内容加载中请稍等...
;
使用帮助 返回顶部