2A J Elbirt,W Yip,B Chetwynd,et al.An FPGA-based performance evaluation of the AES block cipher candidate algorithm finalists[J].IEEE Trans.on VLSI Systems,2001,9(4):545~557
3C C Lu,S Y Tseng.Integrated design of AES (advanced encryption standard) encrypter and decrypter[A].The IEEE International Conference on Application-Specific Systems,Architectures,and Processors (ASAP'02)[C].San Jose,California,2002,277~285