低功率数字信号处理应用的VLSI设计

Low Power VLSI Design for Digital Signal Processing Applications

数字系统的功率优化可以从算法级、结构级、电路级和采用的工艺等各个层次上实现。电路和工艺对于数字系统功率消耗的影响是显然的,但是从结构层次的改变也是减少系统功率的重要方面。给出了一种基于乘法运算单元集成电路的低功率实现方案,以及在不同电路组合和结构实现时系统功率消耗的性能比较。

Power optimizations can be made at the algorithmic, architectural, circuit and technology levels While circuit and technology aspects are well known, transformations at the architectural level can provide considerable power reduction In this paper a low power integrated circuit based on multipliers which implements some of these power minimizations is presented Using a combination of circuit optimizations power savings are achieved The performance comparison under the various technology, circuit style and architectural optimizations is given and analyzed