摘要
介绍了一种固定信号格式的串并转换,利用VHDL(VHSICHardwareDescriptionLan-guage)语言对一块可编程逻辑器件进行编程,实现单片机串行口输出的串行数据到8位并行数据的转换.
A series-parallel conversion of fixed format signal is introduced.A programmable logical device is programmed by VHDL (VHSIC Hardware Description Language) to realize the conversion from series to parallel for single chip computers.
出处
《内蒙古大学学报（自然科学版）》
CAS
CSCD
北大核心
2004年第2期213-215,共3页
Journal of Inner Mongolia University：Natural Science Edition
关键词
VHDL
单片机
串并转换
VHDL
single chip computer
series-parallel conversion
