数字IC可测性设计及其EDA流程

Design for Testability and DFT Design Flow in EDA

介绍了数字IC可测性设计 (DFT)的概念和方法及其在电子设计自动化 (EDA)环境中的实现流程。DFT实质上就是在设计时更改或添加设计结构和模块 ,使之能够满足测试的需要。它的目标包括 :所设计的电路和系统易于测试 ;由此设计所引起的附加硬件应尽可能少 ;电路的附加部分对原来电路的性能影响应尽可能少 ;设计方法的适应面要广。着重介绍了内建自测试DFT、内扫描DFT、边界扫描DFT、IEEEP15 0

DFT becomes important with the extensive application of EDA technique, micro electronic technique and micro packaging. This paper discusses the idea and method of design for testability at first. The design flow for DFT is also introduced.