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神经元MOS的特性分析 被引量：3

The Characteristics Analysis of Neuron MOS
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摘要 在神经元MOS的基本结构和工作原理的基础上,使用器件的等效电路模型通过HSPICE仿真软件对器件进行模拟,给出了器件的转移特性曲线,得到了器件的"可变阈值"特性,并介绍了该器件在CDMA匹配滤波器及数字PWM发生器中的应用。结果表明,该器件可使电路结构大为简化,器件数目大大减少。最后通过对器件运算精度的分析,得出其运算精度主要受MOS晶体管寄生电容等因素的影响。 Based on the basic structure and the principle of neuron MOS, the device is simulated with HSPICE using the equivalent circuit model and the 'variable threshold' characteristics of the device is obtained. The application research of the device is introduced—the applications in CDMA matched filter and digital PWM generator, the research result shows that the circuit can be simplified much through using neuron MOS. Finally, the operation precision of the device is analyzed, the conclusion that the parasitical capacitor of the MOS transistor is the main factor to affect the precision is obtained.
作者 杨媛 高勇 余宁梅
机构地区 西安理工大学自动化与信息工程学院
出处 《西安理工大学学报》 CAS 2004年第1期49-53,共5页 Journal of Xi'an University of Technology
关键词 神经元MOS SPICE模型 浮栅 neuron MOS SPICE model floating gate
分类号 TN432 [电子电信—微电子学与固体电子学]
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参考文献22

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同被引文献13

  • 1汪鹏君,郁军军,戴静,黄道.钟控神经MOS管的改进及其在多值电路中的应用[J].电路与系统学报,2006,11(3):26-29. 被引量：4
  • 2Soo Jin Park, Byoung Hee Yoon, Kwang Sub Yoon, et al. Design of quaternary logic gate using double pass-transistor logic with neuron MOS down literal circuit[C]//34th International Symposium on Multiple-Valued Logic. Toronto, Canada: IEEE Computer Society Press, 2004: 198-203.
  • 3Shen Jing, Tanno K, Ishizuka O, etal. Application of neuron- MOS to current-mode multi-valued logic circuits[C]//Proc 28th ISMVL. Fukuoka, Japan: IEEE Computer Society Press, 1998: 128-133.
  • 4Kang Sung-Mo, Leblebici Yusuf. CMOS Digital Integrated Circuits Analysis and Design [M]. Third Edition. Beijing, China: Publishing House of Electronics Industry, 2005: 146- 150.
  • 5Yohei Ishikawa, Sumio Fukai. A Neuron MOS variable Logic Circuit with The Simplified Circuit Structure [A]. 2004 IEEE Asia-Paclfic Conference on Advanced System Integrated Circuits [C]. Fukuoka, Japan, 2004. 436-437.
  • 6阎石.数字电子技术基础[M].第四版.北京:高等教育出版社,2001:456-492.
  • 7Makoto Syuto,Jing Shen,Koichi Tanno,et al.MultiInput Variable-Threshold Circuits for Multi-Valued Logic Functions[A].The 30th IEEE.International Symposium on Multiple-Valued Logic[C].Portland,Oregon,USA,2000:27-32.
  • 8Yang Yuan,Gao Yong,Yu Ningmei,et al.New application of neuron-MOS in digital PWM generator[A].The 4th international power electronics and motion control conference[C].Xi'an,China,2004:1321-1324.
  • 9Yohei Ishikawa,Sumio Fukai.A Neuron Mos variable Logic Circuit with The Simplified Circuit Structure[A].2004 IEEE Asia-Pacific Conference on Advanced System Integrated Circuits[C ].Fukuoka,JAPAN,2004:436-437.
  • 10A.Medina Santiago,M.A.Reyes Barranca.Circuit for Logical-binary Functions Using MOS Floating-gate Devices[J].The 2nd International Conference on Electrical and Electronics Engineering and Ⅺ Conference on Electrical Engineering (CIE 2005)[C].Mexico City,Mexico,2005:211-214.

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西安理工大学学报
2004年 第1期

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