摘要
提出一种数字传输系统中帧同步码的检测方案 ,利用容错技术和非容错技术相结合来实现帧同步码检测 .提高了帧同步码的检测速度和可靠性 .给出用CPLD(复杂可编程逻辑器件 )
A new approach of the frame synchronization detection is presented. We combine the error-tolerant technology with no error-tolerant technology to carry out the detection of the frame synchronization code. This approach enhances the detection velocity and the reliability of the frame synchronization code. The Implementing methods with hardware and software are also reported.
出处
《河北大学学报(自然科学版)》
CAS
2004年第2期180-183,190,共5页
Journal of Hebei University(Natural Science Edition)
关键词
帧同步码
容错技术
CPLD
frame synchronization code
error-tolerant technology
CPLD