摘要
介绍了一种以大规模可编程逻辑芯片为设计载体,以硬件描述语言VHDL为设计输入,采用模块化单元构建系统,进行数字频率计设计与开发的新方法。
This paper introduces a kind of extensive programmable logic chip to be the design carrier,VHDL as design input method that could design and develop the digital cymometer by using modularization cell design system.
出处
《电测与仪表》
北大核心
2004年第4期52-55,共4页
Electrical Measurement & Instrumentation