一种嵌入式多机系统的设计和实现

Design and implementation of an embedded multi-computer system

介绍了一种由廉价器件组成的多机容错系统,阐述了该容错系统软硬件结构及实现;并介绍了基于CPLD 的总线仲裁结构,讨论容错任务的建立和任务的调度,最后对系统的容错性能作出评价。

A multi-computer fault tolerant system comprising cheap parts is introduced in this paper. The hardware structure of the fault tolerant system and its implementation are stated in this paper. We introduce the bus arbitration structure based on CPLD. We also discuss the creation of the fault tolerant task and the task scheduling. Finally we evaluate the fault tolerant performance of the system.