一种应用于通信设备的5V14位高速数/模转换器

Design of a 5V, 14-bit high speed digital-to-analog converter for telecommunication applications

在研究高速数/模转换器静态和动态性能的基础上,设计了一种5V,14位高速分段式电流舵数/模转换器.设计的5 4 5温度计编码电路和新型对称开关序列,使数/模转换器的积分线性误差和微分线性误差最小.提出的新型开关电流驱动电路提高了数/模转换器的动态性能.基于TSMC0 35μm混合信号CMOS工艺,采用Hspice仿真工具,对14位数/模转换器进行了时域和频域仿真,在50Ω负载条件下满量程电流可达20mA;当采样速率为125MHz时,5V电源的满量程条件下功耗为270mW;输出频率为100MHz条件下的无杂波动态范围为72dBc.14位数/模转换器的积分线性误差为±1.5最低有效位,微分线性误差为±0 75最低有效位.

A 5 V, 14-bit high speed segmented current steering digital-to-analog converter (DAC) for telecommunication applications implemented in a 0.35 μm, 5 V SPTM TSMC CMOS process is described. A 5-4-5 thermometer coder, a new switch sequence and a switch-current driver are described. Based on the TSMC 0.35 μm mixed-signal CMOS technology, the DAC is simulated by the Hspice. The DAC can deliver up to 20mA full-scale current into a 50 Ω load. Power dissipation with a 5 V supply and a full-scale 20 mA is 270 mW at a 125 MSPS clock rate. The INL of 14-bit DAC is ±1.5 LSB, and DNL is ±0.75 LSB. Spurious-Free Dynamic Range (SFDR) is 72dBc at a 125 MSPS clock rate and a 10MHz output frequency.