掺磷多晶硅的干法刻蚀工艺研究

Research on Dry Etching Process of Phosphorus-Doped Polysilicon

本文主要研究功率器件中多晶硅栅的干法刻蚀工艺。首先阐述了多晶硅在金属–氧化物–半导体场效应晶体管(MOSFET)中的重要作用,提出当前多晶硅常采用干法刻蚀工艺实现其微观形貌,同时介绍了干法刻蚀的基本原理。然后重点研究了掺杂对多晶硅刻蚀后形貌的影响,通过对表面异常的表征与分析,探究优化的工艺路线,提出掺杂后的多晶硅必须经过表面湿法处理才可以进入光刻、刻蚀工步。最后将以上优化后的多晶硅刻蚀方案应用于一款6500 V/20 A SiC MOSFET的工艺流程,实测电学性能表现优异。

This article mainly studies the etching process of gate polysiliconin power devices. First, the important role of polysilicon in metal-oxide-semiconductor field effect transistors (MOSFET) is explained. It is proposed that the current polysilicon often adopts dry etching process to achieve its microscopic appearance, and the basic principle of dry etching is introduced. Then it focuses on the influence of doping on the morphology of polysilicon after etching. Through the characterization and analysis of surface anomalies, the optimized process route is explored, and it is proposed that the doped polysilicon must undergo surface wet treatment before it can enter photolithography and etching. Finally, the above optimized polysilicon etching scheme is applied to the process flow of a 6500 V/20 A SiC MOSFET, and it exhibits excellent electrical properties.