面向物联网安全的素域SM2点乘硬件优化

Hardware Optimization of Prime Field SM2 Point Multiplication for IoT Security

为解决现有SM2软硬件实现在物联网应用中由于成本与功耗限制所存在的计算速度较慢问题,采用自下而上的思想对SM2点乘算法分层硬件优化。首先基于DSP乘法器提出单周期并行256位乘法算法KO-5,藉此设计了可流水线操作的2个时钟周期的256位模乘法器;然后基于并行化和流水线技术等设计点运算模块,大大减少了计算时间;最后,通过使用固定窗口点乘算法提升效率。实验结果分析表明,经过优化的点乘模块计算时间为136.68 us,逻辑资源使用仅19.59 kLUTs和144 DSPs,相对同类工作在性能和资源消耗方面均有优势,适用于高性能物联网安全场景。

To solve the problems of slow computation speed in the existing SM2 hardware and software implementations under the cost and power constraints of IoT applications, a bottom-up approach was adopted to optimise the SM2 algorithm hardware hierarchically. Firstly, a single-cycle parallel 256-bit multiplie algorithm KO-5 was proposed based on DSP multiplier, and utilized to design a two-clock-cycle pipeline version of the 256-bit modular multiplication;then the point operation module was designed by through parallelization techniques and pipeline techniques, which greatly reduced the calculation time. Finally, a fixed-window point multiplica-tion algorithm was used to improve the efficiency. The experimental results show that the computation time of the optimized point multiplication module is reduced to 136.68 us only by using 19.59 kLUTs and 144 DSPs logical resources, which has advantages of performance and lower resource utilization compared to similar works, and is suitable for high-performance IoT security scenarios.