通过数值模拟手段,用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R-G电流大小的影响规律。结果表明:无论在FD还是在PD SOI MOS器件中,界面陷阱密度是决定R-G电流峰值的主要因素,硅膜厚度和沟道掺杂浓度的影响却因器...通过数值模拟手段,用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R-G电流大小的影响规律。结果表明:无论在FD还是在PD SOI MOS器件中,界面陷阱密度是决定R-G电流峰值的主要因素,硅膜厚度和沟道掺杂浓度的影响却因器件的类型而导。为了精确地用R-G电流峰值确定界面陷阱的大小,器件参数的影响也必须包括在模型之中。展开更多
在集成电路设计领域,绝缘体上硅(SOI)工艺以其较小的寄生效应、更快的速度,得到广泛应用。但由于SOI工艺器件的结构特点及自加热效应(SHE)的影响,其静电放电(ESD)防护器件设计成为一大技术难点。当工艺进入深亚微米技术节点,基于部分耗...在集成电路设计领域,绝缘体上硅(SOI)工艺以其较小的寄生效应、更快的速度,得到广泛应用。但由于SOI工艺器件的结构特点及自加热效应(SHE)的影响,其静电放电(ESD)防护器件设计成为一大技术难点。当工艺进入深亚微米技术节点,基于部分耗尽型SOI(PD-SOI)工艺的ESD防护器件设计尤为困难。为了提高深亚微米SOI工艺电路的可靠性,开展了分析研究。结合SOI工艺器件的结构特点,针对性地进行了ESD防护器件选择,合理设计了器件尺寸参数,并优化设计了器件版图。使用该设计的一款数字电路,通过了4.5 k V人体模型(HBM)的ESD测试。该设计有效解决了深亚微米SOI工艺ESD防护器件稳健性弱的问题。展开更多
The dependence of the Recombination- Generation( R- G) current on the bulk trap characteristics and sili- con film structure in SOI lateral p+ p- n+ diode has been analyzed num erically by using the simulation tool,D...The dependence of the Recombination- Generation( R- G) current on the bulk trap characteristics and sili- con film structure in SOI lateral p+ p- n+ diode has been analyzed num erically by using the simulation tool,DESSIS- ISE.By varying the bulk trap characteristics such as the trap density and energy level spectrum systematically,the dependence of the R- G current on both of them has been dem onstrated in details.Moreover,the silicon film doping concentration and thickness are changed to make silicon body varies from the fully- depletion m ode into the partial- ly- depletion one.The influence of the transfer of silicon body characteristics on the R- G currenthas also been care- fully examined.A better understanding is obtained of the behavior of bulk trap R- G current in the SOI lateral gat- ed- diode.展开更多
The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demons...The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demonstrates that the effective surface doping concentration and the interface state density of the pocket or halo region are interface states R G current peak position dependent and amplitude dependent,respectively.It can be expressed quantitatively according to the device physics knowledge,thus,the direct characterization of the interface state density and the effective surface doping concentration of the pocket or halo becomes very easy.展开更多
The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is me...The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is measured,and then the densities of the interface and oxide traps are separated independently.The experimental results show that the hot carrier stress of front channel not only results in the strong generation of the front interface traps,but also in the significant oxide traps.These two kinds of traps have similar characteristic in increasing with the hot carrier stress time.This analysis allows one to obtain a clear physical picture of the effects of the hot carrier stress on the generating of interface and oxide traps,which help to understand the degradation and reliability of the SOI MOSFETs.展开更多
The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced...The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced by F-N stressing effect for characterizing the device's reliability.For the measured NMOS/SOI device with a body structure,an expected power-law relati onship as Δ N it - t 0 4 between the pure F-N stressing-indu ced interface trap density and the accumulated stressing time is obtained.展开更多
文摘通过数值模拟手段,用归一化的方法研究了界面陷阱、硅膜厚度和沟道掺杂浓度对R-G电流大小的影响规律。结果表明:无论在FD还是在PD SOI MOS器件中,界面陷阱密度是决定R-G电流峰值的主要因素,硅膜厚度和沟道掺杂浓度的影响却因器件的类型而导。为了精确地用R-G电流峰值确定界面陷阱的大小,器件参数的影响也必须包括在模型之中。
文摘在集成电路设计领域,绝缘体上硅(SOI)工艺以其较小的寄生效应、更快的速度,得到广泛应用。但由于SOI工艺器件的结构特点及自加热效应(SHE)的影响,其静电放电(ESD)防护器件设计成为一大技术难点。当工艺进入深亚微米技术节点,基于部分耗尽型SOI(PD-SOI)工艺的ESD防护器件设计尤为困难。为了提高深亚微米SOI工艺电路的可靠性,开展了分析研究。结合SOI工艺器件的结构特点,针对性地进行了ESD防护器件选择,合理设计了器件尺寸参数,并优化设计了器件版图。使用该设计的一款数字电路,通过了4.5 k V人体模型(HBM)的ESD测试。该设计有效解决了深亚微米SOI工艺ESD防护器件稳健性弱的问题。
基金摩托罗拉和北京大学的联合研究项目!"Gated-Diode Method Application Development and Sensitivity Analysis"的资助 (合同号 :MSPSESTL
文摘The dependence of the Recombination- Generation( R- G) current on the bulk trap characteristics and sili- con film structure in SOI lateral p+ p- n+ diode has been analyzed num erically by using the simulation tool,DESSIS- ISE.By varying the bulk trap characteristics such as the trap density and energy level spectrum systematically,the dependence of the R- G current on both of them has been dem onstrated in details.Moreover,the silicon film doping concentration and thickness are changed to make silicon body varies from the fully- depletion m ode into the partial- ly- depletion one.The influence of the transfer of silicon body characteristics on the R- G currenthas also been care- fully examined.A better understanding is obtained of the behavior of bulk trap R- G current in the SOI lateral gat- ed- diode.
文摘The channel lateral pocket or halo region of NMOSFET characterized by interface state R G current of a forward gated diode has been investigated numerically for the first time.The result of numerical analysis demonstrates that the effective surface doping concentration and the interface state density of the pocket or halo region are interface states R G current peak position dependent and amplitude dependent,respectively.It can be expressed quantitatively according to the device physics knowledge,thus,the direct characterization of the interface state density and the effective surface doping concentration of the pocket or halo becomes very easy.
文摘The front gate interface and oxide traps induced by hot carrier stress in SOI NMOSFETs are studied.Based on a new forward gated diode technique,the R G current originating from the front interface traps is measured,and then the densities of the interface and oxide traps are separated independently.The experimental results show that the hot carrier stress of front channel not only results in the strong generation of the front interface traps,but also in the significant oxide traps.These two kinds of traps have similar characteristic in increasing with the hot carrier stress time.This analysis allows one to obtain a clear physical picture of the effects of the hot carrier stress on the generating of interface and oxide traps,which help to understand the degradation and reliability of the SOI MOSFETs.
文摘The forward gated-diode R-G current method is used to monitor the F-N stressing-induced interface traps of NMOSFET/SOI.This simp le and accurate experiment method can directly give the interface trap density i nduced by F-N stressing effect for characterizing the device's reliability.For the measured NMOS/SOI device with a body structure,an expected power-law relati onship as Δ N it - t 0 4 between the pure F-N stressing-indu ced interface trap density and the accumulated stressing time is obtained.