ALD淀积温度对HfO_2高k栅介质材料特性的影响

采用原子层淀积方法,在不同生长温度下制备了HfO2高k栅介质薄膜,研究了生长温度对HfO2薄膜特性的影响.实验结果表明,HfO2薄膜的生长速率受生长温度的影响很大,在高温区将随着温度的上升而增大,而在低温区将随着温度的降低而增大.通过分析HfO2薄膜的C-V特性发现,不同生长温度下淀积的HfO2薄膜的介电常数和氧化层缺陷数量都有很大区别,过高和过低的生长温度都将增加HfO2薄膜中的原生缺陷,其中,280℃～310℃区间生长的HfO2薄膜中的缺陷最少.

用于流水线ADC的预运放-锁存比较器的分析与设计

提出了一种应用于开关电容流水线模数转换器的CMOS预运放-锁存比较器.该比较器采用UMC混合/射频0.18μm 1P6M P衬底双阱CMOS工艺设计,工作电压为1.8 V.该比较器的灵敏度为0.215 mV,最大失调电压为12 mV,差分输入动态范围为1.8 V,分辨率为8位,在40 M的工作频率下,功耗仅为24.4μW.基于0.18μm工艺的仿真结果验证了比较器设计的有效性.

An Analytical Model of Drain Current for Ultra-Thin Body and Double-Gate Schottky Source/Drain MOSFETs Accounting for Quantum Effects

A compact drain current including the variation of barrier heights and carrier quantization in ultrathin-body and double-gate Schottky barrier MOSFETs （UTBDG SBFETs） is developed. In this model, Schrodinger＇s equation is solved using the triangular potential well approximation. The carrier density thus obtained is included in the space charge density to obtain quantum carrier confinement effects in the modeling of thin-body devices. Due to the quantum effects, the first subband is higher than the conduction band edge, which is equivalent to the band gap widening. Thus, the barrier heights at the source and drain increase and the carrier concentration decreases as the drain current decreases. The drawback of the existing models,which cannot present an accurate prediction of the drain current because they mainly consider the effects of Schottky barrier lowering （SBL） due to image forces,is eliminated. Our research results suggest that for small nonnegative Schottky barrier （SB） heights,even for zero barrier height, the tunneling current also plays a role in the total on-state currents. Verification of the present model was carried out by the device numerical simulator-Silvaco and showed good agreement.

微系统电子产品宇航应用的保证要求

对国内外微系统电子产品技术的发展趋势及管理模式进行了分析,针对微系统电子产品的特点及目前存在的问题,提出了宇航型号用微系统电子产品应按照"制定规划、统一管理,全面保证、统一要求"的原则进行管理的工作思路,分析了微系统电子产品保证应重点考虑的内容,给出了微系统电子产品全研制流程保证的总体要求。

IC中多余物缺陷对信号串扰的定量研究

该文研究了铜互连线中的多余物缺陷对两根相邻的互连线间信号的串扰,提出了互连线之间的多余物缺陷和互连线之间的互容、互感模型,用于定量的计算缺陷对串扰的影响。提出了把缺陷部分单独看作一段RLC电路模型,通过提出的模型研究了不同互连线参数条件下的信号串扰,主要研究了铜互连线的远端串扰和近端串扰,论文最后提出了一些改进串扰的建议。实验结果证明该文提出的信号串扰模型可用于实际的电路设计中,能够对设计人员设计满足串扰要求的电路提供指导。

Valence band structure and density of states effective mass model of biaxial tensile strained silicon based on k·p theory

After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitting energy between light and heavy hole bands. The results show that the valance bands are highly distorted, and the anisotropy is more obvious. To obtain the density of states （DOS） effective mass, which is a very important parameter for device modeling, a DOS effective mass model of biaxial tensile strained Si is constructed based on the valance band calculation. This model can be directly used in the device model of metal-oxide semiconductor field effect transistor （MOSFET）. It also a provides valuable reference for biaxial tensile strained silicon MOSFET design.

The influence and explanation of fringing-induced barrier lowering on sub-100 nm MOSFETs with high-k gate dielectrics

The fringing-induced barrier lowering（FIBL） effect of sub-100 nm MOSFETs with high-k gate dielectrics is investigated using a two-dimensional device simulator.An equivalent capacitance theory is proposed to explain the physics mechanism of the FIBL effect.The FIBL effect is enhanced and the short channel performance is degraded with increasing capacitance.Based on equivalent capacitance theory,the influences of channel length,junction depth,gate/lightly doped drain（LDD） overlap length,spacer material and spacer width on FIBL is thoroughly investigated.A stack gate dielectric is presented to suppress the FIBL effect.

A threshold voltage analytical model for high-k gate dielectric MOSFETs with fully overlapped lightly doped drain structures

We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson＇s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.

新型HfO_2栅介质中的频散效应及参数提取方法

本文研究了原子层化学气相淀积ALCVD(atom layer chemical vapor deposition)方法淀积的HfO2/SiO2/p-SiMOS电容的电特性.高频时,积累电容出现了频率色散现象.针对双频C-V法测量超薄HfO2/SiO2堆栈栅MOS电容中制备工艺和测量设备引入的寄生效应,给出了改进的等效电路模型,消除了频率色散.研究发现,高k介质中存在的缺陷和SiO2/Si处的界面态,使高频C-V特性发生漂移.对禁带中界面态的分布进行归纳,得到C-V曲线形变的规律.研究了形变的C-V曲线与理想C-V特性的偏离,给出了界面态电荷密度的分布,得到了相对于实测C-V曲线的矫正线.通过比较理想C-V曲线和矫正线,提取了平带电压、栅氧化层电荷、SiO2/Si界面的界面态密度等典型的电学参数.

GaN基p-i-n型紫外探测器光生载流子屏蔽效应模型

通过求解光生载流子连续性方程,得出GaN基p-i-n型紫外探测器耗尽层中的光生载流子密度分布.根据泊松方程计算了光生载流子屏蔽电场,并通过数值计算方法将光生载流子屏蔽电场引入器件模型,建立了光生载流子屏蔽效应模型.在此基础上,讨论了光生载流子屏蔽效应对p-i-n型探测器耗尽区光生载流子密度分布的影响,并分析了外加偏压、入射光功率以及载流子寿命对光生载流子屏蔽效应模型的影响.结果表明光生载流子屏蔽效应对器件性能的影响是非单调的,且通过调节外置偏压可以得到最大载流子漂移速度和最小器件响应时间.