An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a hi...An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a high-k（HK） trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage（BV）.Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction（SJ） vertical double-diffused metal-oxide semiconductor（VDMOS）,the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS（TG VDMOS） and conventional superjunction trench gate VDMOS（SJ TG CDMOS）.展开更多
A low specific on-resistance（Ron,sp） integrable silicon-on-insulator（SOI） metal-oxide semiconductor field-effect transistor（MOSFET） is proposed and investigated by simulation.The MOSFET features a recessed drain...A low specific on-resistance（Ron,sp） integrable silicon-on-insulator（SOI） metal-oxide semiconductor field-effect transistor（MOSFET） is proposed and investigated by simulation.The MOSFET features a recessed drain as well as dual gates,which consist of a planar gate and a trench gate extended to the buried oxide layer（BOX）（DGRD MOSFET）.First,the dual gates form dual conduction channels,and the extended trench gate also acts as a field plate to improve the electric field distribution.Second,the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path.Third,the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions.All of these sharply reduce Ron,sp and maintain a high breakdown voltage（BV）.The BV of 233 V and Ron,sp of 4.151 mΩ·cm2（VGS = 15 V） are obtained for the DGRD MOSFET with 15-μm half-cell pitch.Compared with the trench gate SOI MOSFET and the conventional MOSFET,Ron,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV,respectively.The trench gate extended to the BOX synchronously acts as a dielectric isolation trench,simplifying the fabrication processes.展开更多
本文提出一种高k介质电导增强SOI LDMOS新结构(HK CE SOI LDMOS),并研究其机理.HK CE SOI LDMOS的特征是在漂移区两侧引入高k介质,反向阻断时,高k介质对漂移区进行自适应辅助耗尽,实现漂移区三维RESURF效应并调制电场,因而提高器件耐压...本文提出一种高k介质电导增强SOI LDMOS新结构(HK CE SOI LDMOS),并研究其机理.HK CE SOI LDMOS的特征是在漂移区两侧引入高k介质,反向阻断时,高k介质对漂移区进行自适应辅助耗尽,实现漂移区三维RESURF效应并调制电场,因而提高器件耐压和漂移区浓度并降低导通电阻.借助三维仿真研究耐压、比导通电阻与器件结构参数之间的关系.结果表明,HK CE SOI LDMOS与常规超结SOI LDMOS相比,耐压提高16%—18%,同时比导通电阻降低13%—20%,且缓解了由衬底辅助耗尽效应带来的电荷非平衡问题.展开更多
基金Project supported by the National Natural Science Foundation of China (Grant Nos. 60806025 and 61176069 )the Program for New Century Excellent Talents in University of Ministry of Education of China (Grant No. NCET-11-0062)
文摘An ultra-low specific on-resistance trench gate vertical double-diffused metal-oxide semiconductor with a high-k dielectric-filled extended trench（HK TG VDMOS） is proposed in this paper.The HK TG VDMOS features a high-k（HK） trench below the trench gate.Firstly,the extended HK trench not only causes an assistant depletion of the n-drift region,but also optimizes the electric field,which therefore reduces Ron,sp and increases the breakdown voltage（BV）.Secondly,the extended HK trench weakens the sensitivity of BV to the n-drift doping concentration.Thirdly,compared with the superjunction（SJ） vertical double-diffused metal-oxide semiconductor（VDMOS）,the new device is simplified in fabrication by etching and filling the extended trench.The HK TG VDMOS with BV = 172 V and Ron,sp = 0.85 mΩ·cm2 is obtained by simulation;its Ron,sp is reduced by 67% and 40% and its BV is increased by about 15% and 5%,in comparison with those of the conventional trench gate VDMOS（TG VDMOS） and conventional superjunction trench gate VDMOS（SJ TG CDMOS）.
基金Project supported by the National Natural Science Foundation of China (Grant No. 61176069)the Science Foundation from the State Key Laboratory of Electronic Thin Films and Integrated Devices (Grant No. CXJJ201004)the Fund from the National Key Laboratory of Analog Integrated Circuit (Grant No. 9140C090304110C0905)
文摘A low specific on-resistance（Ron,sp） integrable silicon-on-insulator（SOI） metal-oxide semiconductor field-effect transistor（MOSFET） is proposed and investigated by simulation.The MOSFET features a recessed drain as well as dual gates,which consist of a planar gate and a trench gate extended to the buried oxide layer（BOX）（DGRD MOSFET）.First,the dual gates form dual conduction channels,and the extended trench gate also acts as a field plate to improve the electric field distribution.Second,the combination of the trench gate and the recessed drain widens the vertical conduction area and shortens the current path.Third,the P-type top layer not only enhances the drift doping concentration but also modulates the surface electric field distributions.All of these sharply reduce Ron,sp and maintain a high breakdown voltage（BV）.The BV of 233 V and Ron,sp of 4.151 mΩ·cm2（VGS = 15 V） are obtained for the DGRD MOSFET with 15-μm half-cell pitch.Compared with the trench gate SOI MOSFET and the conventional MOSFET,Ron,sp of the DGRD MOSFET decreases by 36% and 33% with the same BV,respectively.The trench gate extended to the BOX synchronously acts as a dielectric isolation trench,simplifying the fabrication processes.
文摘本文提出一种高k介质电导增强SOI LDMOS新结构(HK CE SOI LDMOS),并研究其机理.HK CE SOI LDMOS的特征是在漂移区两侧引入高k介质,反向阻断时,高k介质对漂移区进行自适应辅助耗尽,实现漂移区三维RESURF效应并调制电场,因而提高器件耐压和漂移区浓度并降低导通电阻.借助三维仿真研究耐压、比导通电阻与器件结构参数之间的关系.结果表明,HK CE SOI LDMOS与常规超结SOI LDMOS相比,耐压提高16%—18%,同时比导通电阻降低13%—20%,且缓解了由衬底辅助耗尽效应带来的电荷非平衡问题.
