In-memory computing to break the memory wall

Facing the computing demands of Internet of things(IoT)and artificial intelligence(AI),the cost induced by moving the data between the central processing unit(CPU)and memory is the key problem and a chip featured with flexible structural unit,ultra-low power consumption,and huge parallelism will be needed.In-memory computing,a non-von Neumann architecture fusing memory units and computing units,can eliminate the data transfer time and energy consumption while performing massive parallel computations.Prototype in-memory computing schemes modified from different memory technologies have shown orders of magnitude improvement in computing efficiency,making it be regarded as the ultimate computing paradigm.Here we review the state-of-the-art memory device technologies potential for in-memory computing,summarize their versatile applications in neural network,stochastic generation,and hybrid precision digital computing,with promising solutions for unprecedented computing tasks,and also discuss the challenges of stability and integration for general in-memory computing.

Enhancement of refresh time in quasi-nonvolatile memory by the density of states engineering

The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.

餐厨废弃油脂磺酸盐二元复合驱油效果评价

经磺化反应制备了餐厨废弃油脂磺酸盐(KWOS),通过降低油水间界面张力性能、热稳定性能、抗钙镁离子性能和吸附损耗性能实验评价了KWOS溶液与原油间界面张力的适应性能。配制KWOS和聚丙烯酰胺的二元复合体系开展驱油实验,分析岩心渗透率和KWOS质量分数对该体系驱油效果的影响。结果表明:随着KWOS质量分数增加,油水间的界面张力逐渐降低,当质量分数达到0.175%时,油水界面张力即可降至10^(-3) mN/m数量级。KWOS溶液与原油间的界面张力随热稳定时间增长、钙镁离子总质量浓度增大和吸附损耗有所增加,但仍能够维持在10^(-3) mN/m数量级。随着岩心渗透率降低和KWOS质量分数增加,二元复合体系提高原油采收率均呈现先增加后降低的变化趋势,当岩心渗透率为0.421μm^(2)、KWOS质量分数为0.3%时,二元复合体系提高的原油采收率最高。

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The recently reported quasi-nonvolatile memory based on semi-floating gate architecture has attracted extensive attention thanks to its potential to bridge the large gap between volatile and nonvolatile memory.However,the further extension of the refresh time in quasi-nonvolatile memory is limited by the charge leakage through the p-n junction.Here,based on the density of states engineered van der Waals heterostructures,the leakage of electrons from the floating gate to the channel is greatly suppressed.As a result,the refresh time is effectively extended to more than 100 s,which is the longest among all previously reported quasi-nonvolatile memories.This work provides a new idea to enhance the refresh time of quasi-nonvolatile memory by the density of states engineering and demonstrates great application potential for high-speed and low-power memory technology.

Research on Existing Problems and Countermeasures in College English Translation Teaching

The“College English Curriculum Requirements”promulgated by the Ministry of Education of China has detailed regulations on the five aspects of English listening,speaking,reading,writing,and translating for ordinary undergraduates.However,the foreign language translation ability of most college students in China is still the weak link in the English ability structure.With the further opening up of all walks of life in China,the role of English in daily life and work is becoming more and more important.This paper analyzes and summarizes the current situation and problems of college English translation teaching in China,and proposes corresponding improvement measures.

Ultrafast flash memory with large self-rectifying ratio based on atomically thin MoS_(2)-channel transistor

Flash memory with high operation speed and stable retention performance is in great demand to meet the requirements of big data.In addition,the realisation of ultrafast flash memory with novel functions offers a means of combining heterogeneous components into a homogeneous device without considering impedance matching.This report proposes a 20 ns programme flash memory with 10^(8) self-rectifying ratios based on a 0.65 nm-thick MoS_(2)-channel transistor.A high-quality van der Waals heterojunction with a sharp interface is formed between the Cr/Au metal floating layer and h-BN tunnelling layer.In addition,the large rectification ratio and low ideality factor(n=1.13)facilitate the application of the MoS_(2)-channel flash memory as a bit-line select transistor.Finally,owing to the ultralow MoS_(2)/h-BN heterojunction capacitance(50 fF),the memory device exhibits superior performance as a high-frequency(up to 1 MHz)sine signal rectifier.These results pave the way toward the potential utilisation of multifunctional memory devices in ultrafast two-dimensional NAND-flash applications.