A novel fault current limiter topology design based on liquid metal current limiter

The liquid metal current limiter(LMCL)is regarded as a viable solution for reducing the fault current in a power grid.But demonstrating the liquid metal arc plasma self-pinching process of the resistive wall,and reducing the erosion of the LMCL are challenging,not only theoretically,but also practically.In this work,a novel LMCL is designed with a resistive wall that can be connected to the current-limiting circuit inside the cavity.Specifically,a novel fault current limiter(FCL)topology is put forward where the novel LMCL is combined with a fast switch and current-limiting reactor.Further,the liquid metal self-pinch effect is modeled mathematically in three dimensions,and the gas-liquid two-phase dynamic diagrams under different short-circuit currents are obtained by simulation.The simulation results indicate that with the increase of current,the time for the liquid metal-free surface to begin depressing is reduced,and the position of the depression also changes.Different kinds of bubbles formed by the depressions gradually extend,squeeze,and break.With the increase of current,the liquid metal takes less time to break,but breaks still occur at the edge of the channel,forming arc plasma.Finally,relevant experiments are conducted for the novel FCL topology.The arcing process and current transfer process are analyzed in particular.Comparisons of the peak arc voltage,arcing time,current limiting efficiency,and electrode erosion are presented.The results demonstrate that the arc voltage of the novel FCL topology is reduced by more than 4.5times and the arcing time is reduced by more than 12%.The erosions of the liquid metal and electrodes are reduced.Moreover,the current limiting efficiency of the novel FCL topology is improved by 1%–5%.This work lays a foundation for the topology and optimal design of the LMCL.

Hybrid Operation of Fault Current Limiter and Thyristor Controlled Braking Resistor

The effectiveness of a combination of fault current limiter and thyristor controlled braking resistor on power system stability enhancement and damping turbine shaft torsional oscillations has been studied. If both devices operate at the same bus, the stabilization control scheme can be carried out continuously and with flexibility. As a result, the fault currents are limited, and the generator disturbances and the turbine shaft torsional oscillations are converged quickly. In this paper, the effectiveness of the combination of both devices has been demonstrated by considering 3LG （three-lines-to-ground） fault in a two-machine infinite bus system. Also, temperature rise effect of both devices with various resistance values and weights has been demonstrated. Simulation results indicate a significant power system stability enhancement and damping turbine shaft torsional oscillations as well as with allowable temperature rise.

Placement optimization of Multi-Type fault current limiters based on genetic algorithm

The fault current limiter(FCL)is an effective measure for improving system stability and suppressing short-circuit fault current.Because of space and economic costs,the optimum placement of FCLs is vital in industrial applications.In this study,two objectives with the same dimensional measurement unit,namely,the total capital investment cost of FCLs and circuit breaker loss related to short-circuit currents,are considered.The circuit breaker loss model is developed based on the attenuation rule of the circuit breaker service life.The circuit breaker loss is used to quantify the current-limiting effect to avoid the problem of weight selection in a multi-objective problem.The IEEE 10-generator 39-bus system in New England is used to evaluate the performance of the proposed genetic algorithm(GA)method.Comparative and sensitivity analyses are performed.The results of the optimized plan are validated through simulations,indicating the significant potential of the GA for such optimization.

Current Limiting Characteristic Analysis of Magnetic-controlled Switcher Type Fault Current Limiter

A novel magnetic-controlled switcher type fault current limiter (FCL) based on the topology of the saturated iron core high temperature superconducting FCL is proposed. The magnetic field distribution of the FCL iron core is analyzed by FEA software ANSYS. The current limiting characteristic is investigated by both 3-D field-circuit coupled simulation and Matlab. The experiments on the 220 V/50 A test model show that the FCL can limit the fault current swiftly and effectively,and the FCL has the advantages of simple and reliable structure, flexible control strategy. The simulation and experimental results prove that the theoretical expectation and current limiting performance is satisfactory for practical use.

Fault Current Limiters and Impacts on the System Protection Behavior

A deregulated power market is making short-circuit currents likely to exceed the thermal or mechanical permissible limits of switchgear. Consequently fault current limiters （FCL） become more necessary in power systems. The use of FCLs has an impact on the protection schemes and functions in power systems. Thus, before FCLs can be applied in the network, the impacts on existing protection system must be understood. Depending on the current limiting technique used, today＇s protection concepts may have to be adapted or revised to ensure proper network protection selectivity. A relationship between fault current limiters and protection schemes should be established by taking into account both protection and network specific issues, such as the impact of different FCL technologies, existing and new protection concepts, selectivity and innovative network. This paper is presenting a frame work for accomplishing this task.

Directional Overcurrent Relays Coordination Restoration by Reducing Minimum Fault Current Limiter Impedance

FCL （fault current limiter） is used to solve relays miscoordination problem arises from DG （distributed generation） installation. In most published researches, different optimization methods are developed to obtain optimal relay settings to achieve coordination in case of not installing DG, then depending on the achieved optimal obtained relay settings, FCL impedance is deduced to ensure relays coordination restoration in case of installing DG. Based on original optimal relay settings, obtained FCL impedance is not the minimum one required to achieve relay coordination. The contribution of this paper is the generation of multi sets of original relay settings that increase the possibility of finding FCL impedance of minimum value which is lower than the calculated value based on original optimal relay settings. The proposed method achieves better economic target by reducing FCL impedance. The proposed approach is implemented and tested on IEEE-39 bus test system.

Control-based Fault Current Limiter for Minimizing Impact of Distributed Generation Units on Protection Systems

Distributed generation units(DGUs)bring some problems to the existing protection system,such as those associated with protection blinding and sympathetic tripping.It is known that fault current limiters(FCLs)help minimize the negative impact of DGUs on the protection system.In this paper,a control-based FCL is proposed,i.e.,the FCL is integrated into the DGU control law.To this end,a predictive control strategy with fault current limitation is suggested.In this way,a DGU is controlled,not only for power exchange with the power grid but also to limit its fault current contribution.The proposal is posed as a constrained optimization problem allowing taking into account the current limit explicitly in the design process as a closed-loop solution.A linear approximation is proposed to cope with the inherent nonlinear constraints.The proposal does not require incorporating extra equipment or mechanisms in the control loop,making the design process simple.To evaluate the proposed control-based FCL,both protection blinding and sympathetic tripping scenarios are considered.The control confines the DGU currents within the constraints quickly,avoiding large transient peaks.Therefore,the impact on the protection system is reduced without the necessity that the DGU goes out of service.

Interruption Characteristics of High-speed Switches in 500 kV Fault Current Limiter with High Coupled Split Reactance

A 500 kV high-voltage AC fault current limiter(FCL)based on a high coupled split reactor(HCSR)is pro-posed by the National key R&D project team.Low impedance under normal conditions and high impedance under short-circuit conditions are accomplished by the cooperation of HCSR and high-speed switches.High-speed switches play an important role in current limiting processes,thus interruption characteristics of the high-speed switch in the 500 kV FCL are studied in this paper.The simulation model of the FCL and the external equivalent power grid are established.The short-circuit current and recovery voltage characteristics of the high-speed switch in FCL are simulated.The results show that maximum DC component of the short-circuit current of the high-speed switch reaches 91%,the maximum peak value is 118 kA,and the longest arcing time is 14.8 ms.There is a discontinuity in the curve of the short-circuit current peak and arcing time as a function of the short-circuit occurrence time;the peak recovery voltage of a single break of the high-speed switch has a maximum value of 87.5 kV under a three-phase ungrounded short-circuit condition,and the rate of rise of recovery voltage is o.22 kV/s.The recovery voltage peak shows a period change with the short-circuit occurrence time,and the period is 10 ms.The effects of the shunt capacitor value and short-circuit ground resistance on the recovery voltage of high-speed switching are also studied.The research can be used for reference by R&D personnel and testersof500kVFCLs.Index Terms-Fault current limiter(FCL),high coupled split reactor(HCSR),high-speed switch,interruption characteristics,short circuit current.

Study of the Fast-Closing Switch Used for Fault Current Limiters in Power System

This paper presents a new type of fault current limiter (FCL) based on fast closing switch, which is composed of a capacitor bank and a reactor in series. The main control component is a fast closing switch connected in parallel with the capacitors, which is driven by the electromagnetic repulsion force. It can response the order within 1 ms. When fault occurs, the switch closes and the capacitors are bypassed, and the fault current is limited by the reactor. Simulation analysis and experiment show that the electromagnetic repulsion force actuator can meet the demand of fast closing switch, it is feasible to develop the FCL with low cost and high reliability.

A review of superconducting fault current limiters compared with other proven technologies

Several substations in operation were commissioned decades ago.These substations are overstressed,then their protection equipment cannot provide an effective safety condition to the system.In the worst cases,short‐circuits can cause permanent damage to the system if the overcurrent is higher than the capacity of the installed equipment.There are some possible solutions for those cases:replace all the equipment in the overstressed substation,build a new one in parallel or install a fault current limiter(FCL)device.From an economic point of view,introducing FCLs in the power system is the best way to solve the described problem.The commercial solutions available are the pyrotechnic FCL,air coil reactor,neutral earthing resistor,and high impedance transformer.However,these devices are limited and present several drawbacks.Since the’70s,there has been a search for reliable FCL devices that do not interfere in the regular operation of substations and could limit the fault currents to the protection system rated level.There were so many FCL technologies proposed in the last decades.These proposed new devices may use superconducting technologies,power electronics,or both.This paper reviews proven FCL technologies,focusing on full‐scale devices demonstrated in field and lab tests.The goal is to introduce the main FCL technologies in development and discuss didactically their operation principle,the built prototypes,the commercial units,whether they exist,and the main drawbacks for each technology presented.A final analysis of the level of maturity for each FCL technology is discussed using the TRL(Technology readiness level)scale in order to find technologies with more potential for mass production.The three technologies closer to the full commercial application are:the Resistive Superconducting FCL,the Saturated Iron Core FCL,and the Series Reactor FCL.

Series transformer based diode-bridge-type solid state fault current limiter

We propose a novel series transformer based diode-bridge-type solid state fault current limiter （SSFCL）. To control the fault current, a series RLC branch is connected to the secondary side of an isolation series transformer. Based on this RLC branch, two current limiting modes are created. In the first mode, R and C are bypassed via a paralleled power electronic switch （insulated-gate bipolar transistor, IGBT） and L remains connected to the secondary side of the transformer as a DC reactor. In the second mode, the series reactor impedance is not enough to limit the fault current. In this case, the fault current can be con- trolled by selecting a proper on-off duration of the parallel IGBT, across the series damping resistor （R） and capacitor, which inserts high impedance into the line to limit the fault current. Then, by controlling the magnitude of the DC reactor current, the fault current is reduced and the voltage of the point of common coupling （PCC） is kept at an acceptable level. In addition, in the new SSFCL, the series RC branch, connected in parallel with the IGBT, serves as a snubber circuit for decreasing the transient recovery voltage （TRV） of the IGBT during on-off states. Therefore, the power quality indices can be improved. The measure- ment results of a built prototype are presented to support the simulation and theoretical studies. The proposed SSFCL can limit the fault current without any delay and successfully smooth the fault current waveform.

New method to determine optimum impedance of fault current limiters for symmetrical and/or asymmetrical faults in power systems

To select the type and value of the impedance of fault current limiters（FCLs） for power network designers, we introduce a new method to calculate the optimum value of FCL impedance depending on its position in the network. Due to the complexity of its impedance, the costs of both real and imaginary parts of FCL impedance are considered. The optimization of FCL impedance is based on a goal function that maximizes the reduction of the fault current while minimizing the costs. While the position of FCL in the network has an effect on the calculation of the optimum impedance value, the method for selecting FCL location is not the focus of this study. The proposed method for optimizing FCL impedance can be used for every network that has symmetrical and/or asymmetrical faults. We use a 14-bus IEEE network as an example to explain the process. The optimum FCL impedance used in this network is calculated by considering the vast range of costs for both real and imaginary parts of FCL impedance.

Bias Current Influence on the Characteristic of the Magnetic-controlled Switcher Type Fault Current Limiter

A novel magnetic-controlled switcher type fault current limiter （FCL） for high voltage electric network is presented. The current limiting principle of the FCL and the bias current influence on the characteristic of the FCL axe discussed. The experiments on the 220 V/50 A test model show that the FCL can limit the fault current swiftly and effectively. Under the normal state, the bias current adjustment can change the FCL voltage loss; under the fault state, the steady fault current can be easily adjusted to the preset level by bias current regulating. The experimental result is in accordance with the principle analysis and the FCL has the advantages of flexible control strategy and simple and reliable structure.

Design aspects of transmission voltage superconducting fault current limiters with YBCO tapes in China

The design progress of superconducting fault current limiter(SFCL)for transmission voltage is presented,with a focus on the results of recent key experiments that have led to a state‐of‐the‐art high‐voltage high‐capacity super‐conducting current limiting techniques:the resistive alternating current(AC)SFCL,saturated iron cores AC SFCL,and resistive direct current(DC)SFCL.The main driving factors for designing SFCL in these projects are the preparation of high‐performance superconducting materials,the development of large‐scale superconducting current limiting winding,system testing,and operation technology.Based on the authors’experience with both AC and DC SFCLs,this paper focuses on the main design aspects of resistive SFCL at transmission voltage.The relationship between the hot spot caused by the inhomogeneity of long superconducting tape and the overall parameter selection is presented.In addition,the thermal calculation based on the current limiting resistance and a real‐time current curve is also proposed for the parameter design of the current limiting winding.

Superconducting fault current limiter(SFCL)for fail-safe DC-DC conversion:From power electronic device to micro grid protection

In DC micro grids and networks,DC-DC power converters having a large number of semiconductor-based power electronic devices are usually adopted to interconnect the renewable sources and flexible loads.Most of the semiconductor-based devices suffer from poor fault withstanding abilities,but conventional power electronic protection schemes have the bottlenecks of the time-delay,self-malfunction and mis-judgement.This paper presents a novel solution using the superconducting fault current limiter(SFCL)to protect a power electronic device and extend the usage to a micro grid.This SFCL is actually a self-triggering,recoverable,and passive current limiter,which does not involve any additional circuit hardware and software.Experimental investigations and simulation analyses clarify the feasibility of using this superconductor-based protection scheme to implement the self-acting fail-safe protection of DC-DC converters.Further system-level simulations explore the SFCL to suppress the over-current and stabilize the bus voltage of a photovoltaic based DC micro grid,particularly facing millisecond-level transients and faults.Our experimental and theoretical investigations lay some technical bases to establish a superconductor-semiconductor-coupled interdisciplinary application from the view from the applied superconductivity,to power electronics,and to micro grids.

A Fault Current Limiting Hybrid DC Circuit Breaker

Due to the low impedance characteristic of the high voltage direct current(HVDC)grid,the fault current rises extremely fast after a DC-side fault occurs,and this phenomenon seriously endangers the safety of the HVDC grid.In order to suppress the rising speed of the fault current and reduce the current interruption requirements of the main breaker(MB),a fault current limiting hybrid DC circuit breaker(FCL-HCB)has been proposed in this paper,and it has the capability of bidirectional fault current limiting and fault current interruption.After the occurrence of the overcurrent in the HVDC grid,the current limiting circuit(CLC)of FCL-HCB is put into operation immediately,and whether the protected line is cut off or resumed to normal operation is decided according to the fault detection result.Compared with the traditional hybrid DC circuit breaker(HCB),the required number of semiconductor switches and the peak value of fault current after fault occurs are greatly reduced by adopting the proposed device.Extensive simulations also verify the effectiveness of the proposed FCL-HCB.

Joint Limiting Control Strategy Based on Virtual Impedance Shaping for Suppressing DC Fault Current and Arm Current in MMC-HVDC Systems

This paper proposes a joint limiting control strategy for suppressing DC fault current and arm current in modular multilevel converter-based high-voltage direct current(MMC-HVDC) systems, which includes two target-oriented current limiting controls. To limit the DC fault current in the early fault stage, an equivalent modular multilevel converter(MMC) impedance is obtained, and its high-frequency part is reshaped by introducing virtual impedance, which is realized by adjusting the inserted submodules adaptively. Following the analysis of MMC control characteristics, the arm current limiting strategy is investigated, with results showing that the inner-loop control has significant effects on arm current and that a simple low-pass filter can reduce the arm current in the fault period. Finally, by combining the virtual impedance shaping and innerloop control, the fault currents of DC lines and MMC arms can be suppressed simultaneously, which can not only alleviate the interrupting pressure of the DC circuit breaker, but also prevent the MMC from being blocked by the arm overcurrent. Theoretical analysis conclusions and the proposed strategy are verified offline by a digital time-domain simulation on Power Systems Computer Aided Design/Electromagnetic Transients including DC platform, and experiment on a real-time digital simulator platform.

A Similarity Comparison Based Pilot Protection Scheme for VSC-HVDC Grids Considering Fault Current Limiting Strategy

In the voltage source converter based high-voltage direct current(VSC-HVDC)grids,fast and reliable protections are the key technologies.The traditional protection schemes are easily affected by fault resistance,line distributed capacitance,etc.Meanwhile,the influence of fault current limiting strategy(FCLS)has not been fully considered.In this paper,the fault characteristics under FCLS and the feasibility of traditional travelling wave protections are analyzed.To improve the reliability and sensibility,a similarity comparison based pilot protection scheme is proposed,which focuses on the relationship between the fault characteristics and the state of the protected transmission line,with the establishment of a precise frequencydependent transmission line model.The criteria based on the similarity comparison calculated by cross-wavelet can identify the fault effectively.Meanwhile,the protection scheme can also endure the influence of error synchronization.Finally,the protection performance is verified in the PSCAD/EMTDC under different fault conditions.

Thyristor-inserted MMC Sub-module Topology with DC Fault Blocking Capability

Modular multilevel converter(MMC)is increasingly being applied to high voltage direct current(HVDC)systems.However,dc short circuit situations restrain the application of a conventional half bridge MMC system.In this paper,a new sub-module topology with inserted thyristor can help the MMC system clear a dc side fault.Working states and devices voltage stress of the proposed topology are analyzed and the conduction loss comparison between the proposed topology with several existing topologies with dc fault blocking capability is carried out.Results show the proposed topology is superior to other topologies in terms of conduction loss while using the same voltage rating devices.Besides,compared with traditional half bridge topology,only thyristors and diodes are added in the proposed topology.Therefore,cost of the proposed topology can be lower than conventional hybrid MMC sub-modules.At last,the fault blocking capability of the proposed topology is verified in the simulation.