Texture Analysis of Damascene Copper Interconnects

Texture and grain boundary character distribution of Cu interconnects with different line width for as-deposited and annealed conditions were measured by EBSD. All specimens appear mixed texture and （111） texture is the dominate component.As-deposited interconnects undergo the phenomenon of self-annealing at RT,in which some abnormally large grains are found. Lower aspect ratio of lines and anneal treatment procured larger grains and stronger （111） texture. Meanwhile, the intensity proportion of other textures with lower strain energy to （111） texture is decreased. As-deposited specimens reveal （111）（112？ and （111） （231） components, （111） （110） component appeared and （111） （112？ and （111） （231） components were developed during the annealing process. High angle boundaries are dominant in all specimens, boundaries with a misorientation of 55°-60° and ∑3 ones in higher proportion, followed by lower boundaries with a misorientation of 35°-40° and 29 boundaries. As the aspect ratio of lines and anneal treatment increase,there is a gradual in- crement in ∑3 boundaries and a decrease in ∑9 boundaries.

Progress and Research on Interconnects Crosstalk in Deep Submicron Technology

As develops in deep sub micron designs,the interconnect crosstalk becomes much more serious.Espe cially, the coupling inductance can not be ignored in gigahertz designs.So shield insertion is an efficient technique to reduce the inductive noise.In this paper,the characteristics of on chip mutual inductance (as well as self) for coplanar,micro stripline and stripline structures are introduced first.Then base on the coplanar interconnect structures,the effective coupling K eff model and the RLC explicit noise model are proposed respectively.The results of experiments show that these two models both have high fidelity.

Effects of La_(0.8)Sr_ (0.2)Mn(Fe)O_(3-δ) Protective Coatings on SOFC Metallic Interconnects

SUS430 （16% - 17% （mass fraction） Cr） can be used as interconnects for solid oxide fuel cells （SOFCs） that operate at lower temperatures （ 〈 800 ℃ ）. However, oxidation of steel can occur readily at elevated temperatures leading to the formation of Cr2O3 and spinel （Fe3O4） and thus greatly degrades the performance of the fuel cell. The aim of this work was to reduce oxide growth, in particular, the Cr2O3 phase, through the application of La0.8Sr0.2MnO3-δ （LSM2O） and La0.8Sr0.2FeO3-δ（LSF20） coatings by atmospheric plasma spraying technology （APS）. Oxide growth was characterized by using X-ray diffraction （XRD）, scanning electron microscopy （SEM） with an energy dispersive X-ray （EDX） analyzer. During oxidation of fifty 20 h cycles at 800 ℃ in air, the samples with coatings remained very stable, whereas significant spallation and weight loss were observed for the uncoated steel. LSF20 presents apparently advantages in reducing oxidation growth, interface resistance and inhibition of diffusion of chromium. After exposure in air at 800 ℃ for 1000 h, the interfacial resistance of LSF20-coated alloy is lowered by more than 23 times to that of LSM20-coated layer.

A novel analytical thermal model for multilevel nano-scale interconnects considering the via effect

Based on the heat diffusion equation of multilevel interconnects, a novel analytical thermal model for multilevel nano-scale interconnects considering the via effect is presented, which can compute quickly the temperature of multilevel interconnects, with substrate temperature given. Based on the proposed model and the 65 nm complementary metal oxide semiconductor （CMOS） process parameter, the temperature of nano-scale interconnects is computed. The computed results show that the via effect has a great effect on local interconnects, but the reduction of thermal conductivity has little effect on local interconnects. With the reduction of thermal conductivity or the increase of current density, however, the temperature of global interconnects rises greatly, which can result in a great deterioration in their performance. The proposed model can be applied to computer aided design （CAD） of very large-scale integrated circuits （VLSIs） in nano-scale technologies.

Review： Perspectives on the metallic interconnects for solid oxide fuel cells

The various stages and progress in the development of interconnect materials for solid oxide fuel cells (SOFCs )over the last two decades are reviewed. The criteria for the application of materials as interconnects are highlighted. Interconnects based on lanthanum chromite ceramics demonstrate many inherent drawbacks and therefore are only useful for SOFCs operating around 1000℃. The advance in the research of anode-supported flat SOFCs facilitates the replacement of ceramic interconnects with metallic ones due to their significantly lowered working temperature. Besides, interconnects made of metals or alloys offer many advantages as compared to their ceramic counterpart. The oxidation response and thermal expansion behaviors of various prospective metallic interconnects are examined and evaluated. The minimization of contact resistance to achieve desired and reliable stack performance during their projected lifetime still remains a highly challenging issue with metallic interconnects. Inexpensive coating materials and techniques may play a key role in promoting the commercialization of SOFC stack whose interconnects are constructed of some current commercially available alloys. Alternatively, development of new metallic materials that are capable of forming stable oxide scales with sluggish growth rate and sufficient electrical conductivity is called for.

Vertical assembly of carbon nanotubes for via interconnects

The via interconnects are key components in ultra-large scale integrated circuits （ULSI）. This paper deals with a new method to create single-walled carbon nanotubes （SWNTs） via interconnects using alternating dielectrophoresis （DEP）. Carbon nanotubes are vertically assembled in the microscale via-holes successfully at room temperature under ambient condition. The electrical evaluation of the SWNT vias reveals that our DEP assembly technique is highly reliable and the success rate of assembly can be as high as 90%. We also propose and test possible approaches to reducing the contact resistance between CNT vias and metal electrodes.

Sixteen-element Ge-on-SOI PIN photo-detector arrays for parallel optical interconnects

We describe the structure and testing of one-dimensional array parallel-optics photo-detectors with 16 photodiodes of which each diode operates up to 8 Gb/s. The single element is vertical and top illuminated 30μm-diameter silicon on insulator （Ge-on-SOI） PIN photodetector. High-quality Ge absorption layer is epitaxially grown on SO1 substrate by the ultra-high vacuum chemical vapor deposition （UHV-CVD）. The photodiode exhibits a good responsivity of 0.20 A/W at a wavelength of 1550 nm. The dark current is as low as 0.36/aA at a reverse bias of 1 V, and the corresponding current density is about 51 mA/cm2. The detector with a diameter of 30 t.trn is measured at an incident light of 1.55 μm and 0.5 mW, and the 3-dB bandwidth is 7.39 GHz without bias and 13.9 GHz at a reverse bias of 3 V. The 16 devices show a good consistency.

A Novel Statistical Delay Model Based on the Birnbaum-Saunders Distribution for RLC Interconnects in 90nm Technologies

For performance optimization such as placement,interconnect synthesis,and routing, an efficient and accurate interconnect delay metric is critical,even in design tools development like design for yield （DFY） and design for manufacture （DFM）. In the nanometer regime, the recently proposed delay models for RLC interconnects based on statistical probability density function （PDF）interpretation such as PRIMO,H-gamma,WED and RLD bridge the gap between accuracy and efficiency. However, these models always require table look-up when operating. In this paper, a novel delay model based on the Birnbaum-Saunders distribution （BSD） is presented. BSD can accomplish interconnect delay estimation fast and accurately without table look-up operations. Furthermore, it only needs the first two moments to match. Experimental results in 90nm technology show that BSD is robust, easy to implement,efficient,and accurate.

Analysis of on-chip distributed interconnects based on Pade expansion

In this paper, on-chip interconnects are modeled as distributed parameter RLCG transmission lines, based on which the matrix ABCD of interconnects is deduced. With help of the ABCD matrix, a voltage transfer function of an interconnect system, consisting of a driver, interconnect line and load, is obtained analytically in the form of a transcendental function, and it is reduced to a finite order system based on high order Pade approximation. With the reduced-order transfer function, response waveforms with step input can be obtained, and signal delay can be calculated consequently. Two numerical experiments are conducted to demonstrate its efficiency.

Deposition of Cu seed layer film by supercritical fluid deposition for advanced interconnects

The deposition of a Cu seed layer film is investigated by supercritical fluid deposition （SCFD） using H2 as a reducing agent for Bis（2,2,6,6-tetramethyl-3,5- heptanedionato） copper in supercritical CO2 （scCO2）. The effects of deposition temperature, precursor, and H2 concentration are investigated to optimize Cu deposition. Continuous metallic Cu films are deposited on Ru substrates at 190 ℃ when a 0.002 mol/L Cu precursor is introduced with 0.75 mol/L H2. A Cu precursor concentration higher than 0.002 mol/L is found to have negative effects on the surface qualities of Cu films. For a H2 concentration above 0.56 mol/L, the root-mean-square （RMS） roughness of a Cu film decreases as the H2 concentration increases. Finally, a 20-nm thick Cu film with a smooth surface, which is required as a seed layer in advanced interconnects, is successfully deposited at a high H2 concentration （0.75 tool/L）.

Current sustainability and electromigration of Pd,Sc and Y thin-films as potential interconnects

The progress on novel interconnects for carbon nanotube(CNT)-based electronic circuit is by far behind the remarkable development of CNT-field effect transistors.The Cu interconnect material used in current integrated circuits seems not applicable for the novel interconnects,as it requires electrochemical deposition followed by chemical-mechanical polishing.We report our experimental results on the failure current density,resistivity,electromigration effect and failure mechanism of patterned stripes of Pd,Sc and Y thin-films,regarding them as the potential novel interconnects.The Pd stripes have a failure current density of(8~10)×106 A/cm^2(MA/cm^2),and they are stable when the working current density is as much as 90% of the failure current density.However,they show a resistivity around 210 μΩ·cm,which is 20 times of the bulk value and leaving room for improvement.Compared to Pd,the Sc stripes have a similar resistivity but smaller failure current density of 4~5 MA/cm^2.Y stripes seem not suitable for interconnects by showing even lower failure current density than that of Sc and evidence of oxidation.For comparison,Au stripes of the same dimensions show a failure current density of 30 MA/cm^2 and a resistivity around 4 μΩ·cm,making them also a good material as novel interconnects.

Short-Range Optical Wireless Communications for Indoor and Interconnects Applications

Optical wireless communications have been widely studied during the past decade in short-range applications, such as indoor highspeed wireless networks and interconnects in data centers and high-performance computing. In this paper, recent developments in high-speed short-range optical wireless communications are reviewed, including visible light communications （VLCs）, infrared indoor communication systems, and reconfigurable optical interconnects. The general architecture of indoor high-speed optical wireless communications is described, and the advantages and limitations of both visible and infrared based solutions are discussed. The concept of reconfigurable optical interconnects is presented, and key results are summarized. In addition, the challenges and potential future directions of short-range optical wireless communications are discussed.

Simplified Model of a Layer of Interconnects under a Spiral Inductor

An empirical effective medium approximation that provides a homogeneous equivalent for a layer of interconnects un-derneath a spiral inductor is presented. When used as part of a numerical 3D model of the inductor, this approach yields a faster simulation that uses less memory, yet still predicts the quality factor and inductance to within 1%. We expect this technique to find use in the electromagnetic modeling of System-on-Chip.

Quasi-Dynamic Green’s Functions for Efficient Full-Wave Integral Formulations for Microstrip Interconnects

Integral formulations are widely used for full-wave analysis of microstrip interconnects. A weak point of these formulations is the inclusion of the proper planar-layered Green’s Functions (GFs), because of their computational cost. To overcome this problem, usually the GFs are decomposed into a quasi-dynamic term and a dynamic one. Under suitable approximations, the ?rst may be given in closed form, whereas the second is approximated. Starting from a general criterion for this decomposition, in this paper we derive some simple criteria for using the closed-form quasi-dynamic GFs instead of the complete GFs, with reference to the problem of evaluating the full-wave current distribution along microstrips. These criteria are based on simple relations between frequency, line length, dielectric thickness and permittivity. The layered GFs have been embedded into a full-wave transmission line model and the results are ?rst benchmarked with respect to a full-wave numerical 3D tool, then used to assess the proposed criteria.

Characterization of the arrangement feature of copper interconnects by Moir inversion method

This paper explores the planar arrangement feature of the copper interconnects in a view field of several millimeters by the focused ion-beam （FIB） Moire inversion method quantitatively. The curved FIB Moire patterns indicate that the copper interconnects are a series of curves with continuous variations instead of beelines. The control equation set of the copper interconnects central lines is attained through the Moire inversion method. This work can be extended to inspect the structural defects and provide a reliable support for the interconnects structure fabrication.

Electric Current-induced Failure of 200-nm-thick Gold Interconnects

200-nm-thick Au interconnects on a quartz substrate were tested in-situ inside a dual-beam microscope by applying direct current, alternating current and alternating current with a small direct current component. The failure behavior of the Au interconnects under three kinds of electric currents were characterized in-situ by scanning electron microscopy. It is found that the formation of voids and subsequent growth perpendicular to the interconnect direction is the fatal failure mode for all the Au interconnects under three kinds of electric currents. The failure mechanism of the ultrathin metal lines induced by the electric currents was analyzed.

Mechanics of nonbuckling interconnects with prestrain for stretchable electronics

The performance of the flexibility and stretchability of flexible electronics depends on the mechanical structure design,for which a great progress has been made in past years.The use of prestrain in the substrate,causing the compression of the transferred interconnects,can provide high elastic stretchability.Recently,the nonbuckling interconnects have been designed,where thick bar replaces thin ribbon layout to yield scissor-like in-plane deformation instead of in-or out-of-plane buckling modes.The nonbuckling interconnect design achieves significantly enhanced stretchability.However,combined use of prestrain and nonbuckling interconnects has not been explored.This paper aims to study the mechanical behavior of nonbuckling interconnects bonded to the prestrained substrate analytically and numerically.It is found that larger prestrain,longer straight segment,and smaller arc radius yield smaller strain in the interconnects.On the other hand,larger prestrain can also cause larger strain in the interconnects after releasing the prestrain.Therefore,the optimization of the prestrain needs to be found to achieve favorable stretchability.

Oxidation and Electrical Properties of Cu-Mn_(3)O_(4)Composite Coating Obtained by Electrodeposition on SOFC Interconnects

Cu-Mn_(3)O_(4)composite coating was prepared on the SUS 430 ferritic stainless steel by electrodeposition and then exposed in air at 800℃corresponding to the cathode atmosphere of solid oxide fuel cell(SOFC).A dual-layer oxide structure mainly comprising an external layer of CuO followed by(Cu,Mn,Fe)_(3)O_(4)spinel and an internal layer of Cr-rich oxide was thermally developed on the coated steel.The scale area-specific resistances(ASRs)of the coated steels were lower than the scale ASR of the uncoated steel after identical thermal exposure.The external layer of CuO/(Cu,Mn,Fe)_(3)O_(4)spinel not only served as a barrier to reduce the growth rate of Cr-rich oxide internal layer and to suppress the outward diffusion of Cr,but also lowered the surface scale ASRs considerably.

Uniform wire segmentation algorithm of distributed interconnects

A uniform wire segmentation algorithm for performance optimization of distributed RLC interconnects was proposed in this paper. The optimal wire length for identical segments and buffer size for buffer inser-tion are obtained through computation and derivation, based on a 2-pole approximatian model of distribut-ed RLC interconnect. For typical inductance value and long wires under 180nm technology, experiments show that the uniform wire segmentation technique proposed in the paper can reduce delay by about 27%～56%, while requires 34%～69% less total buffer usage and thus 29% to 58% less power consump-tion. It is suitable for long RLC interconnect performance optimization.

Secure optical interconnects using orbital angular momentum beams multiplexing/multicasting

Orbital angular momentum(OAM),described by an azimuthal phase term expej lθT,has unbound orthogonal states with different topological charges l.Therefore,with the explosive growth of global communication capacity,especially for short-distance optical interconnects,light-carrying OAM has proved its great potential to improve transmission capacity and spectral efficiency in the space-division multiplexing system due to its orthogonality,security,and compatibility with other techniques.Meanwhile,100-m freespace optical interconnects become an alternative solution for the“last mile”problem and provide interbuilding communication.We experimentally demonstrate a 260-m secure optical interconnect using OAM multiplexing and 16-ary quadrature amplitude modulation(16-QAM)signals.We study the beam wandering,power fluctuation,channel cross talk,bit-error-rate performance,and link security.Additionally,we also investigate the link performance for 1-to-9 multicasting at the range of 260 m.Considering that the power distribution may be affected by atmospheric turbulence,we introduce an offline feedback process to make it flexibly controllable.