Design of Hybrid Compensators for Power Quality Improvement of Oilfield Drilling Electrical System

With large-scale use of kinds of motors, oilfield drilling electrical system always accompanied by serious power quality problem, including reactive current, harmonics current and grid voltage distortion, which would greatly threaten the safety and proper working of the whole system. This paper focuses on a power quality improvement project to solve these problems. A hybrid compensating scheme, including an active compensator and a passive compensator, is carried out. Because of the specificity of oilfield drilling electrical system, compensators are redesigned against features of this application background. And then the current detection point arrangement of this hybrid system is also taken into consideration to build the whole system much more effective and reliable. Now the improvement project is already implemented in application field, and the power quality of the system is greatly improved.

Optimal electromagnetic hybrid negative current compensation method for high-speed railway power supply system

To achieve economical compensation for the huge-capacity negative sequence currents generated by high-speed railway load, an electromagnetic hybrid compensation system(EHCS) and control strategy is proposed.The EHCS is made up of a small-capacity railway static power conditioner(RPC) and a large-capacity magnetic static var compensator(MSVC). Compared with traditional compensation methods, the EHCS makes full use of the SVC’s advantages of economy and reliability and of RPC’s advantages of technical capability and flexibility. Based on the idea of injecting a negative sequence, the compensation principle of the EHCS is analyzed in detail. Then the minimum installation capacity of an EHCS is theoretically deduced. Furthermore, a constraint optimization compensation strategy that meets national standards, which reduces compensation capacity further, is proposed. An experimental platform based on a digital signal processor(DSP) and a programmable logic controller(PLC) is built to verify the analysis. Simulated and experimental results are given to demonstrate the effectiveness and feasibility of the proposed method.

A power-efficient 12-bit analog-to-digital converter with a novel constant-resistance CMOS input sampling switch

Apower-efficient 12-bit40-MS/spipelineanalog-to-digitalconverter（ADC）implementedina0.13 μm CMOS technology is presented. A novel CMOS bootstrapping switch, which offers a constant on-resistance over the entire input signal range, is used at the sample-and-hold front-end to enhance the dynamic performance of the pipelined ADC. By implementing with 2.5-bit-per-stage and a simplified amplifier sharing architecture between two successive pipeline stages, a very competitive power consumption and small die area can be achieved. Meanwhile, the substrate-biasing-effect attenuated T-type switches are introduced to reduce the crosstalk between the two op- amp sharing successive stages. Moreover, a two-stage gain boosted recycling folded cascode （RFC） amplifier with hybrid frequency compensation is developed to further reduce the power consumption and maintain the ADC＇s performance simultaneously. The measured results imply that the ADC achieves a spurious-free dynamic range （SFDR） of 75.7 dB and a signal-to-noise-plus-distortion ratio （SNDR） of 62.74 dB with a 4.3 MHz input signal; the SNDR maintains over 58.25 dB for input signals up to 19.3MHz. The measured differential nonlinearity （DNL） and integral nonlinearity （INL） are -0.43 to ＋0.48 LSB and -1.62 to ＋ 1.89 LSB respectively. The prototype ADC consumes 28.4 mW under a 1.2-V nominal power supply and 40 MHz sampling rate, transferring to a figure- of-merit （FOM） of 0.63 pJ per conversion-step.

Multi-variable Dependent Forecast Algorithm for Predicting Secondary Arc

Hybrid reactive power compensation(HRPC)combines step-controlled shunt reactors and series compensation,and will be employed in ultra-high-voltage(UHV)power systems.The single-phase auto-reclosure characteristics of secondary arcs in systems with HRPC require further investigation.In this paper,both the arc-recalling voltage and subsidiary variations in arc current are investigated with and without HRPC.The frequency components of the secondary arc current and variations in arcing time are analyzed for various influential factors,such as the neutral reactor,arc resistance,fault location,degrees of compensation of HRPC,and the length of the transmission line.The non-dominated sorting genetic algorithm II(NSGA-II)and support vector machine regression are combined to create a multi-variable dependent forecasting algorithm to predict the characteristics of the secondary arc in UHV systems with HRPC.This paper provides a theoretical reference for optimizing the parameters of HRPC,and for developing adaptive auto-reclosure schemes and protection equipment.