The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation f...The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.展开更多
RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and sche...RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and schematics of the RF board and the test results are given.In view of the inevitable inconsistency in the multi-channel circuit,a calibration circuit is designed to reduce such an influence.The test results show that the calibration method is useful for beam current dependence which is sensitive to channels inconsistency.展开更多
An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considera...An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.展开更多
This paper presents a fully integrated RF front-end with an automatic gain control(AGC) scheme and a digitally controlled radio frequency varied gain amplifier(RFVGA) for a U/V band China Mobile Multimedia Broadca...This paper presents a fully integrated RF front-end with an automatic gain control(AGC) scheme and a digitally controlled radio frequency varied gain amplifier(RFVGA) for a U/V band China Mobile Multimedia Broadcasting(CMMB) direct conversion receiver.The RFVGA provides a gain range of 50 dB with a 1.6 dB step. The adopted AGC strategy could improve immunity to adjacent channel signal,which is of importance for CMMB application.The front-end,composed of a low noise amplifier(LNA),an RFVGA,a mixer and AGC,achieves an input referred 3rd order intercept point(IIP3) of 4.9 dBm with the LNA in low gain mode and the RFVGA in medium gain mode,and a less than 4 dB double side band noise figure with both the LNA and the RFVGA in high gain mode.The proposed RF front-end is fabricated in a 0.35μm SiGe BiCMOS technology and consumes 25.6 mA from a 3.0 V power supply.展开更多
A CMOS RF(radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawi...A CMOS RF(radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF(noise figure) and IP3(third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors(DMGTR).The dB-in-linear VGA(variable gain amplifier) exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.展开更多
This paper presents a wideband RF front-end with novel current-reuse wide band low noise amplifier (LNA), current-reuse V-I converter, active double balanced mixer and transimpedance amplifier for short range device...This paper presents a wideband RF front-end with novel current-reuse wide band low noise amplifier (LNA), current-reuse V-I converter, active double balanced mixer and transimpedance amplifier for short range device (SRD) applications. With the proposed current-reuse LNA, the DC consumption of the front-end reduces considerably while maintaining sufficient performance needed by SRD devices. The RF front-end was fabricated in 0.18μm RFCMOS process and occupies a silicon area of just 0.11 mm^2. Operating in 433 MHz band, the measurement results show the RF front-end achieves a conversion gain of 29.7 dB, a double side band noise figure of 9.7 dB, an input referenced third intercept point of -24.9 dBm with only 1.44 mA power consumption from 1.8 V supply. Compared to other reported front-ends, it has an advantage in power consumption.展开更多
A wideband large dynamic range and high linearity U-band RF front-end for mobile DTV is introduced, and includes a noise-cancelling low-noise amplifier (LNA), an RF programmable gain amplifier (RFPGA) and a curren...A wideband large dynamic range and high linearity U-band RF front-end for mobile DTV is introduced, and includes a noise-cancelling low-noise amplifier (LNA), an RF programmable gain amplifier (RFPGA) and a current communicating passive mixer. The noise/distortion cancelling structure and RC post-distortion compensation are employed to improve the linearity of the LNA. An RFPGA with five stages provides large dynamic range and fine gain resolution. A simple resistor voltage network in the passive mixer decreases the gate bias voltage of the mixing transistor, and optimum linearity and symmetrical mixing is obtained at the same time. The RF front-end is implemented in a 0.25 #m CMOS process. Tests show that it achieves an IIP3 (third-order intercept point) of -17 dBm, a conversion gain of 39 dB, and a noise figure of 5.8 dB. The RFPGA achieves a dynamic range of-36.2 to 23.5 dB with a resolution of 0.32 dB.展开更多
This paper describes a CMOS low noise amplifier (LNA) plus the quadrature mixers intended for use in the front-end of portable global positioning system (GPS) receivers. The LNA makes use of an inductively degener...This paper describes a CMOS low noise amplifier (LNA) plus the quadrature mixers intended for use in the front-end of portable global positioning system (GPS) receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gil- bert cell type. The circuits are implemented in a TSMC 0.18μm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise and an input return loss of - 22.3dB. The fully differential figure of 2.4dB,an input ldB compression point of - 22dBm, circuits only draw 5.4mW from a 1.8V supply.展开更多
A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly red...A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.展开更多
文摘The China initiative Accelerator Driven System,CiADS,physics design adopts 162.5 MHz,325 MHz,and 650 MHz cavities,which are driven by the corresponding radio frequency(RF)power system,requiring frequency translation front-end for the RF station.For that application,a general-purpose design front-end prototype has been developed to evaluate the multi-frequency point supported design feasibility.The difficult parts to achieve the requirements of the general-purpose design are reasonable device selection and balanced design.With a carefully selected low-noise wide-band RF mixer and amplifier to balance the performance of multi-frequency supported down-conversion,specially designed LO distribution net to increase isolation between adjacent channels,and external band-pass filter to realize expected up-conversion frequencies,high maintenance and modular front-end generalpurpose design has been implemented.Results of standard parameters show an R2 value of at least 99.991%in the range of-60-10 dBm for linearity,up to 18 dBm for P1dB,and up to 89 dBc for cross talk between adjacent channels.The phase noise spectrum is lower than 80 dBc in the range of 0-1 MHz;cumulative phase noise is 0.006°;and amplitude and phase stability are 0.022%and 0.034°,respectively.
基金Supported by 100 Talents Program of The Chinese Academy of Sciences
文摘RF circuit board has a significant impact on performance of the Digital Beam Position Monitor (DBPM) in storage ring of a synchrotron radiation facility.In this paper,a front-end RF board is designed for DBPM,and schematics of the RF board and the test results are given.In view of the inevitable inconsistency in the multi-channel circuit,a calibration circuit is designed to reduce such an influence.The test results show that the calibration method is useful for beam current dependence which is sensitive to channels inconsistency.
文摘An analog front-end of HF passive RFID transponders compatible with ISO/IEC 18000-3 is presented.Design considerations, especially the power transmission in the RFID transponder, are analyzed. Based on these considerations,an analog front-end is presented with novel architecture, high power conversion efficiency, low voltage, low power consumption, and high performance in an environment of noise and power fluctuation. The circuit is implemented in a Chartered 0.35μm standard CMOS process. The experimental results show that the chip can satisfy the design target well.
文摘This paper presents a fully integrated RF front-end with an automatic gain control(AGC) scheme and a digitally controlled radio frequency varied gain amplifier(RFVGA) for a U/V band China Mobile Multimedia Broadcasting(CMMB) direct conversion receiver.The RFVGA provides a gain range of 50 dB with a 1.6 dB step. The adopted AGC strategy could improve immunity to adjacent channel signal,which is of importance for CMMB application.The front-end,composed of a low noise amplifier(LNA),an RFVGA,a mixer and AGC,achieves an input referred 3rd order intercept point(IIP3) of 4.9 dBm with the LNA in low gain mode and the RFVGA in medium gain mode,and a less than 4 dB double side band noise figure with both the LNA and the RFVGA in high gain mode.The proposed RF front-end is fabricated in a 0.35μm SiGe BiCMOS technology and consumes 25.6 mA from a 3.0 V power supply.
文摘A CMOS RF(radio frequency) front-end for digital radio broadcasting applications is presented that contains a wideband LNA,I/Q-mixers and VGAs,supporting other various wireless communication standards in the ultrawide frequency band from 200 kHz to 2 GHz as well.Improvement of the NF(noise figure) and IP3(third-order intermodulation distortion) is attained without significant degradation of other performances like voltage gain and power consumption.The NF is minimized by noise-canceling technology,and the IP3 is improved by using differential multiple gate transistors(DMGTR).The dB-in-linear VGA(variable gain amplifier) exploits a single PMOS to achieve exponential gain control.The circuit is fabricated in 0.18-μm CMOS technology.The S11 of the RF front-end is lower than -11.4 dB over the whole band of 200 kHz-2 GHz.The variable gain range is 12-42 dB at 0.25 GHz and 4-36 dB at 2 GHz.The DSB NF at maximum gain is 3.1-6.1 dB.The IIP3 at middle gain is -4.7 to 0.2 dBm.It consumes a DC power of only 36 mW at 1.8 V supply.
文摘This paper presents a wideband RF front-end with novel current-reuse wide band low noise amplifier (LNA), current-reuse V-I converter, active double balanced mixer and transimpedance amplifier for short range device (SRD) applications. With the proposed current-reuse LNA, the DC consumption of the front-end reduces considerably while maintaining sufficient performance needed by SRD devices. The RF front-end was fabricated in 0.18μm RFCMOS process and occupies a silicon area of just 0.11 mm^2. Operating in 433 MHz band, the measurement results show the RF front-end achieves a conversion gain of 29.7 dB, a double side band noise figure of 9.7 dB, an input referenced third intercept point of -24.9 dBm with only 1.44 mA power consumption from 1.8 V supply. Compared to other reported front-ends, it has an advantage in power consumption.
基金supported by the National High-Tech R&D Program of China(No.2011AA040102)the National Science and Technology Major Project of the Ministry of Science and Technology of China(No.2009ZX01031-002-008-002)
文摘A wideband large dynamic range and high linearity U-band RF front-end for mobile DTV is introduced, and includes a noise-cancelling low-noise amplifier (LNA), an RF programmable gain amplifier (RFPGA) and a current communicating passive mixer. The noise/distortion cancelling structure and RC post-distortion compensation are employed to improve the linearity of the LNA. An RFPGA with five stages provides large dynamic range and fine gain resolution. A simple resistor voltage network in the passive mixer decreases the gate bias voltage of the mixing transistor, and optimum linearity and symmetrical mixing is obtained at the same time. The RF front-end is implemented in a 0.25 #m CMOS process. Tests show that it achieves an IIP3 (third-order intercept point) of -17 dBm, a conversion gain of 39 dB, and a noise figure of 5.8 dB. The RFPGA achieves a dynamic range of-36.2 to 23.5 dB with a resolution of 0.32 dB.
文摘This paper describes a CMOS low noise amplifier (LNA) plus the quadrature mixers intended for use in the front-end of portable global positioning system (GPS) receivers. The LNA makes use of an inductively degenerated input stage and power-constrained simultaneous noise and input matching techniques. The quadrature mixers are based on a Gil- bert cell type. The circuits are implemented in a TSMC 0.18μm RF CMOS process. Measurement results show that a voltage conversion gain of 35dB is achieved with a cascade noise and an input return loss of - 22.3dB. The fully differential figure of 2.4dB,an input ldB compression point of - 22dBm, circuits only draw 5.4mW from a 1.8V supply.
文摘A new,low-cost RFID tag analog front-end compatible with ISO 14443A and ISO 14443B is presented. By substituting conventional multi-circle antenna with single-circle antenna, the package cost of the tag is greatly reduced. Based on this exasperate antenna performance,a new rectifier with high power conversion efficiency and low turn-on voltage is presented. The circuit is implemented in an SMIC 0.18μm EEPROM process. Measurement results show that with a 120kΩ load,the power conversion efficiency reaches as high as 36%. For a sinusoidal wave with magnitude of 0. 5V, the output DC voltage reaches IV,which is high enough for RFID tags. The read distance is as far as 22cm.