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Substrates for flip Chip Packaging
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《电子工业专用设备》 2006年第8期I0017-I0022,共6页
关键词 chip Substrates for flip chip packaging
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Drop failure modes of Sn-3.0Ag-0.5Cu solder joints in wafer level chip scale package 被引量:5
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作者 黄明亮 赵宁 +1 位作者 刘爽 何宜谦 《Transactions of Nonferrous Metals Society of China》 SCIE EI CAS CSCD 2016年第6期1663-1669,共7页
To reveal the drop failure modes of the wafer level chip scale packages (WLCSPs) with Sn-3.0Ag-0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were iden... To reveal the drop failure modes of the wafer level chip scale packages (WLCSPs) with Sn-3.0Ag-0.5Cu solder joints, board level drop tests were performed according to the JEDEC standard. Six failure modes were identified, i.e., short FR-4 cracks and complete FR-4 cracks at the printing circuit board (PCB) side, split between redistribution layer (RDL) and Cu under bump metallization (UBM), RDL fracture, bulk cracks and partial bulk and intermetallic compound (IMC) cracks at the chip side. For the outmost solder joints, complete FR-4 cracks tended to occur, due to large deformation of PCB and low strength of FR-4 dielectric layer. The formation of complete FR-4 cracks largely absorbed the impact energy, resulting in the absence of other failure modes. For the inner solder joints, the absorption of impact energy by the short FR-4 cracks was limited, resulting in other failure modes at the chip side. 展开更多
关键词 Sn-3.0Ag-0.5Cu wafer level chip scale package solder joint drop failure mode
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Integrated power electronics module based on chip scale packaged power devices 被引量:2
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作者 王建冈 阮新波 《Journal of Southeast University(English Edition)》 EI CAS 2009年第3期367-371,共5页
High performance can be obtained for the integrated power electronics module(IPEM) by using a three-dimensional packaging structure instead of a planar structure. A three- dimensional packaged half bridge-IPEM (HB-... High performance can be obtained for the integrated power electronics module(IPEM) by using a three-dimensional packaging structure instead of a planar structure. A three- dimensional packaged half bridge-IPEM (HB-IPEM), consisting of two chip scale packaged MOSFETs and the corresponding gate driver and protection circuits, is fabricated at the laboratory. The reliability of the IPEM is controlled from the shape design of solder joints and the control of assembly process parameters. The parasitic parameters are extracted using Agilent 4395A impedance analyzer for building the parasitic parameter model of the HB- IPEM. A 12 V/3 A output synchronous rectifier Buck converter using the HB-IPEM is built to test the electrical performance of the HB-IPEM. Low voltage spikes on two MOSFETs illustrate that the three-dimensional package of the HB-IPEM can decrease parasitic inductance. Temperature distribution simulation results of the HB-IPEM using FLOTHERM are given. Heat dissipation of the solder joints makes the peak junction temperature of the chip drop obviously. The package realizes three-dimensional heat dissipation and has better thermal management. 展开更多
关键词 integrated power electronics module chip scale package RELIABILITY parasitic parameter thermal management
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The Numerical Analysis of Strain Behavior at Solder Joint and Interface of Flip Chip Package
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作者 S C Chen Y C Lin 《厦门大学学报(自然科学版)》 CAS CSCD 北大核心 2002年第S1期186-188,共3页
The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that ... The flip chip package is a kind of advanced electri ca l packages. Due to the requirement of miniaturization, lower weight, higher dens ity and higher performance in the advanced electric package, it is expected that flip chip package will soon be a mainstream technology. The silicon chip is dir ectly connected to printing circuit substrate by SnPb solder joints. Also, the u nderfill, a composite of polymer and silica particles, is filled in the gap betw een the chip and substrate around the solder joints to improve the reliabili ty of solder joints. When flip chip package specimen is tested with thermal cycl ing, the cyclic stress/strain response that exists at the underfill interfaces and solder joints may result in interfacial crack initiation and propagation. Therefore, the chip cracking and the interfacial delamination between underfill and chip corner have been investigated in many studies. Also, most researches h ave focused on the effect of fatigue and creep properties of solder joint induce d by the plastic strain alternation and accumulation. The nuderfill must have lo w viscosity in the liquid state and good adhesion to the interface after solidif ying. Also, the mechanical behavior of such epoxy material has much dependen ce on temperature in its glass transition temperature range that is usually cove red by the temperature range of thermal cycling test. Therefore, the materia l behavior of underfill exists a significant non-linearity and the assumption o f linear elastic can lack for accuracy in numerical analysis. Through numerical analysis, this study had some comparisons about the effect of linear and non -linear properties of underfill on strain behaviors around the interface of fli p chip assembly. Especially, the deformation tendency inside solder bumps could be predicted. Also, it is worthily mentioned that we have pointed out which comp onent of plastic strain, thus, either normal or shear, has dominant influence to the fatigue and creep of solder bump, which have not brought up before. About the numerical analysis to the thermal plastic strain occurs in flip chip i nterconnection during thermal cycling test, a commercial finite element software , namely, ANSYS, was employed to simulate the thermal cycling test obeyed by MIL-STD-883C. The temperatures of thermal cycling ranged from -55 ℃ to 125 ℃ with ramp rate of 36 ℃/min and a dwell time of 25 min at peak temperature. T he schematic drawing of diagonal cross-section of flip chip package composed of FR-4 substrate, silicon chip, underfill and solder bump was shown as Fig.1. Th e numerical model was two-dimensional (2-D) with plane strain assumption and o nly one half of the cross-section was modeled due to geometry symmetry. The dim ensions and boundary conditions of numerical model were shown in Fig.2. The symm etric boundary conditions were applied along the left edge of the model, and the left bottom corner was additional constrained in vertical direction to prevent body motion. The finite element meshes of overall and local numerical model was shown as Fig.3. In this study, two cases of material model were used to describe the material behavior of the underfill: the case1 was linear elastic model that assumed Young’s Modulus (E) and thermal expansion coefficient (CTE) were consta nt during thermal cycling; the case2 was MKIN model (in ANSYS) that had nonlinea r temperature-dependent stress-strain relationship and temperature-dependent CTE. The material model applied to the solder bump was ANAND model (in ANSYS) th at described time-dependent plasticity phenomenon of viscoplastic material. Bot h the FR-4 substrate and silicon chip were assumed as temperature-independent elastic material; moreover, FR-4 substrate is orthotropic while silicon chip is isotropic. From the comparison between numerical results of linear and nonlinear material a ssumption of underfill, (i.e. case1 and case2), the quantities of plastic strain around the interconnection from case1 are higher than that in case2. Thus, the linear 展开更多
关键词 The Numerical Analysis of Strain Behavior at Solder Joint and Interface of Flip chip Package
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Sampling Moiré method for full-field deformation measurement: A brief review 被引量:2
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作者 Qinghua Wang Shien Ri 《Theoretical & Applied Mechanics Letters》 CSCD 2022年第1期42-48,共7页
The sampling Moiré(SM) method is one of the vision-based non-contact deformation measurement methods, which is a powerful tool for structural health monitoring and elucidation of damage mechanisms of materials. I... The sampling Moiré(SM) method is one of the vision-based non-contact deformation measurement methods, which is a powerful tool for structural health monitoring and elucidation of damage mechanisms of materials. In this review, the basic principle of the SM method for measuring the twodimensional displacement and strain distributions is introduced. When the grid is not a standard orthogonal grating and cracks exist on the specimen surface, the measurement methods are also stated. Two of the most typical application examples are described in detail. One is the dynamic deflection measurement of a large-scale concrete bridge, and the other is the residual thermal strain measurement of small-scale flip chip packages. Several further development points of this method are pointed out. The SM method is expected to be used for deformation measurement of various structures and materials for residual stress evaluation, crack location prediction, and crack growth evaluation on broad scales. 展开更多
关键词 Displacement measurement Strain distribution BRIDGE Flip chip package
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Ceramic thermal wind sensor based on advanced direct chip attaching package 被引量:1
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作者 周麟 秦明 +1 位作者 陈升奇 陈蓓 《Journal of Semiconductors》 EI CAS CSCD 2014年第7期107-111,共5页
An advanced direct chip attaching packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct ch... An advanced direct chip attaching packaged two-dimensional ceramic thermal wind sensor is studied. The thermal wind sensor chip is fabricated by metal lift-off processes on the ceramic substrate. An advanced direct chip attaching (DCA) packaging is adopted and this new packaged method simplifies the processes of packaging further. Simulations of the advanced DCA packaged sensor based on computational fluid dynamics (CFD) model show the sensor can detect wind speed and direction effectively. The wind tunnel testing results show the advanced DCA packaged sensor can detect the wind direction from 0° to 360° and wind speed from 0 to 20 m/s with the error less than 0.5 m/s. The nonlinear fitting based least square method in Matlab is used to analyze the performance of the sensor. 展开更多
关键词 advanced direct chip attaching package CFD model ceramic chip thermal wind sensor
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