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Parallel Software-Based Self-Testing with Bounded Model Checking for Kilo-Core Networks-on-Chip
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作者 张颖 季鹏飞 +3 位作者 朱潘玮 Zebo Peng 李华伟 江建慧 《Journal of Computer Science & Technology》 SCIE EI CSCD 2023年第2期405-421,共17页
Online testing is critical to ensuring reliable operations of the next generation of supercomputers based on a kilo-core network-on-chip(NoC)interconnection fabric.We present a parallel software-based self-testing(SBS... Online testing is critical to ensuring reliable operations of the next generation of supercomputers based on a kilo-core network-on-chip(NoC)interconnection fabric.We present a parallel software-based self-testing(SBST)solution that makes use of the bounded model checking(BMC)technique to generate test sequences and parallel packets.In this method,the parallel SBST with BMC derives the leading sequence for each router’s internal function and detects all functionally-testable faults related to the function.A Monte-Carlo simulation algorithm is then used to search for the approximately optimum configuration of the parallel packets,which guarantees the test quality and minimizes the test cost.Finally,a multi-threading technology is used to ensure that the Monte-Carlo simulation can reach the approximately optimum configuration in a large random space and reduce the generating time of the parallel test.Experimental results show that the proposed method achieves a high fault coverage with a reduced test overhead.Moreover,by performing online testing in the functional mode with SBST,it effectively avoids the over-testing problem caused by functionally untestable turns in kilo-core NoCs. 展开更多
关键词 software-based self-testing(SBST) parallel test kilo-core networks-on-chip(NoCs) online testing
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异构千核处理器系统的统一内存地址空间访问方法 被引量:2
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作者 裴颂文 吴小东 +1 位作者 唐作其 熊乃学 《国防科技大学学报》 EI CAS CSCD 北大核心 2015年第1期28-33,共6页
为了达到异构多核处理器能直接交叉访问对方的内存地址空间的目的,通过构建统一的三级Cache结构和数据块状态标记方法,并优化Cache块状态的修改算法,提出了异构千核处理器系统的统一内存地址空间访问方法,避免了当前独立式异构计算机系... 为了达到异构多核处理器能直接交叉访问对方的内存地址空间的目的,通过构建统一的三级Cache结构和数据块状态标记方法,并优化Cache块状态的修改算法,提出了异构千核处理器系统的统一内存地址空间访问方法,避免了当前独立式异构计算机系统结构下复制和传输数据块所带来的大量额外访存开销。通过采用部分Rodinia基准测试程序测试,获得了最高9.8倍的系统加速比,最多减少了90%的访存频率。因此,采用该方法能有效减少异构核心间交换数据块所带来的系统开销,提高异构千核处理器的系统性能加速比。 展开更多
关键词 异构千核处理器 内存地址空间 交叉式直接访问 CACHE
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