A novel method of encoded multiplexing readout for micro-pattern gas detectors

The requirement of a large number of electronic channels poses a big challenge to the further applications of Micro-pattern Gas Detectors （MPGDs）. By using the redundancy that at least two neighboring strips record the signal of a particle, a novel method of encoded multiplexing readout for MPGDs is presented in this paper. The method offers a feasible and easily-extensible way of encoding and decoding, and can significantly reduce the number of readout channels. A verification test was carried out on a 5 cm×5 cm Thick Gas Electron Multiplier （THGEM） detector using a 8 keV Cu X-ray source with 100um slit, where 166 strips were read out by 21 encoded readout channels. The test results show good linearity in its position response, and the spatial resolution root-mean-square （RMS） of the test system is about 260um. This method has potential to build large area detectors and can be easily adapted to other detectors similar to MPGDs.

A prototype scalable readout system for micro-pattern gas detectors

A scalable readout system （SRS） is designed to provide a general solution for different micro-pattern gas detectors in various applications. The system mainly consists of three kinds of modules： the ASIC card, the adapter card and the front-end card （FEC）. The ASIC cards, mounted with particular ASIC chips, are designed for receiving detector signals. The adapter card is in charge of digitizing the output signals from several ASIC cards. The FEC, edged-mounted with the adapter, has field-programmable gate array （FPGA）-based reconfigurable logic and I/O interfaces, allowing users to choose different ASIC cards and adapters for different experiments, which expands the system to various applications. The FEC transfers data through Gigabit Ethernet protocol realized by a TCP processor （SiTCP） IP core in FPGA. By assembling a flexible number of FECs in parallel through Gigabit Ethernet, the readout system can be tailored to specific sizes to adapt to the experiment scales and readout requirements. In this paper, two kinds of multi-channel ASIC chip, VA140 and AGET, are applied to verify the scalability of this SRS architecture. Based on this VA140 or AGET SRS, one FEC covers 8 ASIC （VA140） cards handling 512 detector channels, or 4 ASIC （AGET） cards handling 256 detector channels, respectively. More FECs can be assembled in crates to handle thousands of detector channels.