An Improved Angle Polishing Method for Measuring Subsurface Damage in Silicon Wafers

We present an improved angle polishing method in which the end of the cover slice near the glue layer is beveled into a thin,defect-free wedge,the straight edge of which is used as the datum for measuring the depth of subsurface damage. The bevel angle can be calculated from the interference fringes formed in the wedge. The minimum depth of the subsurface damage that can be measured by this method is a few hundred nanometers. Our results show that the method is straightforward, accurate, and convenient.

Microstructure studies of the grinding damage in monocrystalline silicon wafers

The depth and nature of the subsurface damage in a silicon wafer will limit the performance of IC components. Damage microstructures of the silicon wafers ground by the #325, #600, and #2000 grinding wheels was analyzed. The results show that many microcracks, fractures, and dislocation rosettes appear in the surface and subsurface of the wafer ground by the #325 grinding wheel. No obvious microstructure change exists. The amorphous layer with a thickness of about 100 nm, microcracks, high density dislocations, and polycrystalline silicon are observed in the subsurface of the wafer ground by the #600 grinding wheel. For the wafer ground by the #2000 grinding wheel, an amorphous layer of about 30 nm thickness, a polycrystalline silicon layer, a few dislocations, and an elastic deformation layer exist. In general, with the decrease in grit size, the material removal mode changes from micro-fracture mode to ductile mode gradually.

Electrochemical behaviors of silicon wafers in silica slurry

The electrochemical behaviors of n-type silicon wafers pH value and solid content of the slurry on the corrosion of silicon in silica-based slurry were investigated, and the influences of the wafers were studied by using electrochemical DC polarization and AC impedance techniques. The results revealed that these factors affected the corrosion behaviors of silicon wafers to different degrees and had their suitable parameters that made the maximum corrosion rate of the wafers. The corrosion potential of （100） sttrface was lower than that of（111）, whereas the current density of （100） was much higher than that of（111）.

DESIGN AND FABRICATION OF SUPER-HYDROPHOBIC SURFACES ON SILICON WAFERS AND STUDY OF EFFECTS TO HYDROPHOBICITY

Some superhydrophobic siliconbased surfaces with periodic square pillar array microstructures were designed and fabricated, also their apparent contact angles （CAs） were quantitatively measured. On the basis of the classical Wenzel＇s theory and Cassie＇s theory, two generally applicable equations corresponding of the cases of wetted contact and composite contact, which could reflect the relations between geometrical parameters of square pillar microstructures and apparent CAs, were educed. Then a theoretical prediction of the fabricated siliconbased surfaces was carried out by the equations, which was compatible with the result of experimental measurement, and this showed the rationality of the educed equations. The CAs of the surface prepared by merely plasma etching to create microstructures and by only Teflon treating were compared, and the result indicated that the effect of the former on achieving hydrophobic surfaces was greater than that of the later. Under the premise of synthetically considering transition between the two contact states, the effects of geometrical parameters of the square pillar microstructures to hydrophobicity were analyzcation, thereon a design condition and a design principle for super-hydrophobic surfaces which would be of specific application value were summarized.

Effect of Rapid Thermal Annealing Ambient on Gettering Efficiency and Surface Microstructure in 300mm CZ Silicon Wafers

The effect of rapid thermal annealing （RTA） ambient on denuded zone and oxygen precipitates in Czochralski （CZ） silicon wafers is studied in this paper. N2 and a N2/NH3 mixture are used as RTA ambient. It is demonstrated that a high density of oxygen precipitates and thin denuded zone are obtained in N2/NH3 ambient,while a relatively lower density of oxygen precipitates and thicker denuded zone are observed in N2 ambient. As the RTA duration times increased, the oxygen precipitate density increased and the denuded zone depth decreased. X-ray photoelectron spectroscopy （XPS） data and atomic force microscope （AFM） results show that there RTA process,which can explain the different effect of RTA was a surface nitriding reaction during the N2/NH3 ambient ambient.

Finite Element Analysis for Grinding and Lapping of Wire-sawn Silicon Wafers

Silicon wafers are the most widely used substrates for semiconductors. The falling price of silicon wafers has created tremendous pressure on silicon wafer manufacturers to develop cost-effective manufacturing processes. A critical issue in wafer production is the waviness induced by wire sawing. If this waviness is not removed, it will affect wafer flatness and semiconductor performance. In practice, both lapping and grinding have been used to flatten wire-sawn wafers. Although grinding is not as effective as lapping in removing waviness, it has many other advantages over lapping (such as higher throughput, fully automatic, and more benign to environment) and has great potential to reduce manufacturing cost of silicon wafers. This paper presents a finite element analysis (FEA) study on grinding and lapping of wire-sawn silicon wafers. An FEA model is first developed to simulate the waviness deformation of wire-sawn wafers in grinding and lapping processes. It is then used to explain how the waviness is removed or reduced by lapping and grinding and why the effectiveness of grinding in removing waviness is different from that of lapping. Furthermore, the model is used to study the effects of various parameters including active-grinding-zone orientation, grinding force, waviness wavelength, and waviness height on the reduction and elimination of waviness. Finally, the results of pilot experiments to verify the model are discussed.

Surface Damage in Wire cut Silicon Wafers

The surface damage and the damage depth in wire-cut silicon wafers and inner-diameter (ID) cut silicon wafers were studied by means of thickness meter, scanning electron microscopy (SEM) and double crystal X-ray diffractometer. The results show that the surface of wire-cut silicon wafers is rougher than that of ID-cut silicon wafers and the surface damage in wire-cut silicon wafers is more serious than that in ID-cut silicon wafers, while the damage depth in wire-cut silicon wafers is smaller than that in ID-cut silicon wafers. The possible reasons for the generation of surface damage in wire-cut silicon wafers were also discussed.

Controlled Synthesis and Growth of Perfect Platinum Nanocubes Using a Pair of Low-Resistivity Fastened Silicon Wafers and Their Electrocatalytic Properties

Perfect platinum （Pt） nanocubes with high density have been synthesized by controlled reduction of hexachloroplatinic acid in the presence of H2SO4 and HCl, employing a pair of low-resistivity fastened silicon （FS） wafers at room temperature. The presence of the additive charges （induced by prior etching of the silicon surface with HF to remove any SiO2 layer） between the interfaces of the FS surface results in a high charge density and facilitates fast deposition of Pt nanoparticles via electroless plating. The charge density, stirring time, and homogeneity of the aqueous solution influenced the geometrical shapes of the Pt nanoparticles. The parameters were finely tuned in order to control the nucleation and growth rates and obtain perfect Pt nanocubes. The perfect Pt nanocubes were single crystalline with exposed {100} facets. Per equivalent Pt surface areas, the perfect Pt nanocubes showed enhanced catalytic activity relative to truncated Pt nanocubes or spherical Pt nanoparticles for the electrooxidation of liquid feed fuels such as methanol and ethanol. Moreover, there a strong correlation was observed between the optical, electrical, thermal, magnetic, and catalytic properties of the perfect Pt nanocubes which should lead to a variety of technological applications of these materials.

Effects of taping on grinding quality of silicon wafers in backgrinding

Taping is often used to protect patterned wafers and reduce fragmentation during backgrinding of silicon wafers.Grinding experiments using coarse and fine resinbond diamond grinding wheels were performed on silicon wafers with tapes of different thicknesses to investigate the effects of taping on peak-to-valley(PV),surface roughness,and subsurface damage of silicon wafers after grinding.Results showed that taping in backgrinding could provide effective protection for ground wafers from breakage.However,the PV value,surface roughness,and subsurface damage of silicon wafers with taping deteriorated compared with those without taping although the deterioration extents were very limited.The PV value of silicon wafers with taping decreased with increasing mesh size of the grinding wheel and the final thickness.The surface roughness and subsurface damage of silicon wafers with taping decreased with increasing mesh size of grinding wheel but was not affected by removal thickness.We hope the experimental finding could help fully understand the role of taping in backgrinding.

A Diamond Electrochemical Cleaning Technique for Organic Contaminants on Silicon Wafer Surfaces

Peroxodiphosphate anion （a powerful oxidant） can be formed in a special water-based cleaning agent through an electrochemical reaction on boron-doped diamond electrodes. This electrochemical reaction was applied during the oxidation,decomposition, and removal of organic contaminations on a silicon wafer surface, and it was used as the first step in the diamond electrochemical cleaning technique （DECT）. The cleaning effects of DECT were compared with the RCA cleaning technique, including the silicon surface chemical composition that was observed with X-ray photoelectron spectroscopy and the morphology observed with atomic force microscopy. The measurement results show that the silicon surface cleaned by DECT has slightly less organic residue and lower micro-roughness,so the new technique is more effective than the RCA cleaning technique.

Residual stress analysis on silicon wafer surface layers induced by ultraprecision grinding

Grinding residual stresses of silicon wafers affect the performance of IC circuits. Based on the wafer rotation ultra-precision grinding ma-chine, the residual stress distribution along grinding marks and ground surface layer depth of the ground wafers are investigated using Raman microspectroscopy. The results show that the ground wafer surfaces mainly present compressive stress. The vicinity of pile-ups between two grinding marks presents higher a compressive stress. The stress value of the rough ground wafer is the least because the material is removed by the brittle fracture mode. The stress of the semi-fine ground wafer is the largest because the wafer surface presents stronger phase trans-formations and elastic-plastic deformation. The stress of the fine ground wafer is between the above two. The strained layer depths for the rough, semi-fine, and fine ground wafers are about 7.6 m, 2.6 m, and 1.1 m, respectively. The main reasons for generation of residual stresses are phase transformations and elastic-plastic deformation.

STUDIES OF SURFACE GRINDING TEMPERATURE AFFECTED BY DIFFERENT GRINDING WAYS OF SILICON WAFER

The surface grinding temperature of the silicon wafer ground by diamond wheels is studied.Rudimentally,the properties of the surface grinding temperature generated by two grinding methods,ground by straight and cup wheels respectively,are analyzed.In addition,considering the effects of grain size and grinding depth on surface grinding temperature during these two grinding processes,significant results and conclusions are obtained from experimental research.

Development of a miniature silicon wafer fuel cell using L-ascorbic acid as fuel

In the current studies a miniature silicon wafer fuel cell(FC) using L-ascorbic acid as fuel was developed. The cell employs L-ascorbic acid and air as reactants and a thin polymer electrolyte as a separator. Inductively coupled plasma(ICP) silicon etching was employed to fabricate high aspect-ratio columns on the silicon substrate to increase the surface area. A thin platinum layer deposited directly on the silicon surface by the sputtering was used as the catalyst layer for L-ascorbic acid electro-oxidation. Cyclic voltammetry shows that the oxidation of L-ascorbic acid on the sputtered platinum layer is irreversible and that the onset potentials for the oxidation of L-ascorbic acid are from 0.27 V to 0.35 V versus an Ag/AgCl reference electrode. It is found that at the room temperature,with 1 mol/L L-ascorbic acid/PBS(phosphate buffered solution) solution pumped to the anode at 1 ml/min flow rate and air spontaneously diffusing to the cathode as the oxidant,the maximum output power density of the cell was 1.95 mW/cm2 at a current density of 10 mA/cm2.

Stability Behaviour of Monolayer Tetraether Lipids on the Amino-Silanised Silicon Wafer: Comparative Study between Langmuir-Blodgett Monolayers with Self-Assembled Monolayers

This study investigated the stability behaviour of molecular monolayer symmetric chemically modified tetraether lipids caldarchaeol-PO4 on the amino-silanised silicon wafer using Langmuir-Blodgett films, Self Assembling Monolayers (SAMs), ellipsometry, and atomic force microscopy (AFM). The monolayers of caldarchaeol-PO4 were stable on the solid surface amino-silanised silicon wafer. The organizations of molecular monolayers caldarchaeol-PO4 by Langmuir-Blodgett method and SAMs have been analyzed. The surface of pressure in Langmuir-Blodgett processing is carried out monolayers caldarchaeol-PO4 more flat island inhomogeneous. Another method of monolayers caldarchaeol-PO4 by SAMs is showed a large flat domain. Monolayers caldarchaeol-PO4 by Langmuir-Blodgett method seems to be stable and chemically resistant after washing with organic solvent and an additional treatment ultrasonification with various thickness lipids arround 2 nm to 6 nm. Conversely, monolayer caldarchaeol-PO4 by SAMs appears fewer than monolayers caldarchaeol-PO4 by Langmuir-Blodgett method, the thickness of various from 1 nm to 3 nm.

Anomalous Emission And Carrier Effect of Fresh Porous Silicon

The emission and Fourier transformation infrared spectra of freshly prepared porous silicon(PS) and the silicon wafer were examined. Increasing temperature generally led to a decrease in the emission intensities of the PS samples, however, the freshly prepared sample showed an unusually large and sudden increase in its emission intensity at the specific temperature at which the hydrogen ion conductivity in the silicon wafer increased. The O-H vibrations of the silicon wafer also showed a sudden decrease at the same temperature. These results are consistent with the assumption that the luminescence of fresh PS comes from the carrier bound exciton in its confined nanostructure.

Effects of thermal transport properties on temperature distribution within silicon wafer

A combined conduction and radiation heat transfer model was used to simulate the heat transfer within wafer and investigate the effect of thermal transport properties on temperature non-uniformity within wafer surface. It is found that the increased conductivities in both doped and undoped regions help reduce the temperature difference across the wafer surface. However, the doped layer conductivity has little effect on the overall temperature distribution and difference. The temperature level and difference on the top surface drop suddenly when absorption coefficient changes from 104 to 103 m-1. When the absorption coefficient is less or equal to 103 m-1, the temperature level and difference do not change much. The emissivity has the dominant effect on the top surface temperature level and difference. Higher surface emissivity can easily increase the temperature level of the wafer surface. After using the improved property data, the overall temperature level reduces by about 200 K from the basis case. The results will help improve the current understanding of the energy transport in the rapid thermal processing and the wafer temperature monitor and control level.

Slim Water Injection Nozzle for Silicon Wafer Wet Cleaning Bath

In order to effectively and quickly clean the surface of semiconductor silicon wafers, the fluid flow is one of the significant issues. For a batch-type silicon wafer wet cleaning bath, a slim water injection nozzle consisting of a dual tube was studied, based on theoretical calculations and experiments. A thin inner tube was placed at the optimum position in the water injection nozzle. Such a simple design could make the water injection direction normal and the water velocity profile symmetrical along the nozzle. The water flow in the wet cleaning bath was observed using a blue-colored ink tracer. When the nozzle developed in this study was placed at the bottom of the bath, a fast and symmetrical upward water stream was formed between and around the wafers.

STRUCTURE AND BINDING STATE OF CN_x FILMS SYNTHESIZED BY FACING TARGETS SPUTTERING

CN x films were made by a facing targets sputtering ( FTS) systemon the Si(100) substrate under different N 2 partial pressure. XRD, XPS, FTIR and Raman Spectroscopy( RS) were measured to investigate the structure and the binding state of the film. The films are amorphous and the N/C increases with the N 2 partial pressure increasing and reaches 0 46 when the N 2 pressure is 100%. The N incorporated C forms N sp 2C and N sp 3C mainly and there is a small amount of C≡N.

Real-Time Thermomechanical Modeling of PV Cell Fabrication via a POD-Trained RBF Interpolation Network

This paper presents a numerical reduced order model framework to simulate the physics of the thermomechanical processes that occur during c-Si photovoltaic(PV)cell fabrication.A response surface based on a radial basis function(RBF)interpolation network trained by a Proper Orthogonal Decomposition(POD)of the solution fields is developed for fast and accurate approximations of thermal loading conditions on PV cells during the fabrication processes.The outcome is a stand-alone computational tool that provides,in real time,the quantitative and qualitative thermomechanical response as a function of user-controlled input parameters for fabrication processes with the precision of 3D finite element analysis(FEA).This tool provides an efficient and effective avenue for design and optimization as well as for failure prediction of PV cells.