Review in situ transmission electron microscope with machine learning

Advanced electronic materials are the fundamental building blocks of integrated circuits(ICs).The microscale properties of electronic materials(e.g.,crystal structures,defects,and chemical properties)can have a considerable impact on the performance of ICs.Comprehensive characterization and analysis of the material in real time with high-spatial resolution are indispensable.In situ transmission electron microscope(TEM)with atomic resolution and external field can be applied as a physical simulation platform to study the evolution of electronic material in working conditions.The high-speed camera of the in situ TEM generates a high frame rate video,resulting in a large dataset that is beyond the data processing ability of researchers using the traditional method.To overcome this challenge,many works on automated TEM analysis by using machine-learning algorithm have been proposed.In this review,we introduce the technical evolution of TEM data acquisition,including analysis,and we summarize the application of machine learning to TEM data analysis in the aspects of morphology,defect,structure,and spectra.Some of the challenges of automated TEM analysis are given in the conclusion.

An in situ Digital Background Calibration Algorithm for Multi-Channel R-βR Ladder DACs

The R-2R resistor ladder is one of the best topologies for implementing compact-sized digital-to-analog converter(DAC)arrays in implantable neuro-stimulators.However,it has a limited resolution and considerable inter-channel variation due to component mismatches.To avoid losing analog information,we present sub-radix-2 DAC implemented by the R-βR resistor ladder in this paper.The digital successive approximation register(DSAR)algorithm corrects the transfer function of DACs based on their actual bit weights.Furthermore,a low-cost in situ adaptive bit-weight calibration(ABC)algorithm drives the analog output error between two DACs to zero by adjusting their bit weights automatically.The simulation results show that the proposed algorithm can calibrate the non-linear transfer function of each DAC and the gain error among multiple channels in the background.

Optimal parameter space for stabilizing the ferroelectric phase of Hf_(0.5)Zr_(0.5)O_(2) thin films under strain and electric fields

Hafnia-based ferroelectric materials, like Hf_(0.5)Zr_(0.5)O_(2)(HZO), have received tremendous attention owing to their potentials for building ultra-thin ferroelectric devices. The orthorhombic(O)-phase of HZO is ferroelectric but metastable in its bulk form under ambient conditions, which poses a considerable challenge to maintaining the operation performance of HZO-based ferroelectric devices. Here, we theoretically addressed this issue that provides parameter spaces for stabilizing the O-phase of HZO thin-films under various conditions. Three mechanisms were found to be capable of lowering the relative energy of the O-phase, namely, more significant surface-bulk portion of(111) surfaces, compressive c-axis strain,and positive electric fields. Considering these mechanisms, we plotted two ternary phase diagrams for HZO thin-films where the strain was applied along the in-plane uniaxial and biaxial, respectively. These diagrams indicate the O-phase could be stabilized by solely shrinking the film-thickness below 12.26 nm, ascribed to its lower surface energies. All these results shed considerable light on designing more robust and higher-performance ferroelectric devices.

Top gate engineering of field-effect transistors based on wafer-scale two-dimensional semiconductors

The investigation of two-dimensional(2D)materials has advanced into practical device applications,such as cascaded logic stages.However,incompatible electrical properties and inappropriate logic levels remain enormous challenges.In this work,a doping-free strategy is investigated by top gated(TG)MoS_(2) field-effect transistors(FETs)using various metal gates(Au,Cu,Ag,and Al).These metals with different work functions provide a convenient tuning knob for controlling threshold voltage(V_(th))for MoS_(2) FETs.For instance,the Al electrode can create an extra electron doping(n-doping)behavior in the MoS_(2) TG-FETs due to a dipole effect at the gate-dielectric interface.In this work,by achieving matched electrical properties for the load transistor and the driver transistor in an inverter circuit,we successfully demonstrate wafer-scale MoS_(2) inverter arrays with an optimized inverter switching threshold voltage(V_(M))of 1.5 V and a DC voltage gain of 27 at a supply voltage(V_(DD))of 3 V.This work offers a novel scheme for the fabrication of fully integrated multistage logic circuits based on wafer-scale MoS_(2) film.