Schur Complement Computations in Intel^(■) Math Kernel Library PARDISO

This paper describes a method of calculating the Schur complement of a sparse positive definite matrix A. The main idea of this approach is to represent matrix A in the form of an elimination tree using a reordering algorithm like METIS and putting columns/rows for which the Schur complement is needed into the top node of the elimination tree. Any problem with a degenerate part of the initial matrix can be resolved with the help of iterative refinement. The proposed approach is close to the “multifrontal” one which was implemented by Ian Duff and others in 1980s. Schur complement computations described in this paper are available in Intel®Math Kernel Library (Intel®MKL). In this paper we present the algorithm for Schur complement computations, experiments that demonstrate a negligible increase in the number of elements in the factored matrix, and comparison with existing alternatives.

Intel^(■) Math Kernel Library PARDISO* forIntel^(■) Xeon Phi^(TM) Manycore Coprocessor

The paper describes an efficient direct method to solve an equation Ax = b, where A is a sparse matrix, on the Intel®Xeon PhiTM coprocessor. The main challenge for such a system is how to engage all available threads (about 240) and how to reduce OpenMP* synchronization overhead, which is very expensive for hundreds of threads. The method consists of decomposing A into a product of lower-triangular, diagonal, and upper triangular matrices followed by solves of the resulting three subsystems. The main idea is based on the hybrid parallel algorithm used in the Intel®Math Kernel Library Parallel Direct Sparse Solver for Clusters [1]. Our implementation exploits a static scheduling algorithm during the factorization step to reduce OpenMP synchronization overhead. To effectively engage all available threads, a three-level approach of parallelization is used. Furthermore, we demonstrate that our implementation can perform up to 100 times better on factorization step and up to 65 times better in terms of overall performance on the 240 threads of the Intel®Xeon PhiTM coprocessor.

Intel移动运算争锋

英特尔公司2009年在32nm与22nm先进制程技术上有良好的进展,持续展现摩尔定律（Moore’s Law）的重要性。英特尔对于创新的坚定承诺将协助带动整个运算和通信产业的进一步增长,特别是在移动运算和无线领域。

原位电子束诱导沉积制备碳纳米结构

以多壁碳纳米管为基本材料,利用电子束诱导沉积的方法进行了纳米结构加工、修饰研究。电子束诱导沉积实现了二个碳纳米管端部之间的牢固焊接,实现了纳米材料间的几乎无损伤连接。原位测量表明多壁碳纳米管间的连接为欧姆接触。进一步对碳纳米管施加外电场可以使端部碳原子间的π键打开,外部碳原子经电子束诱导沉积在碳纳米管的端部,并定向生长成非晶态碳纳米线。由于碳纳米管和纳米线结合处的σ键作为绝缘界面,形成了电子输运的势垒,所得到的碳纳米管-纳米线复合结构具有整流特性。利用电子显微镜进行纳米材料的结构加工、修饰,具有选择位置精确、可实时监测、对纳米材料几乎无损伤、重复性和可靠性高,以及加工尺度可人为控制的特点。

Effect of N2 and O2 on OH radical production in an atmospheric helium microwave plasma jet

UV-pulsed laser cavity ringdown spectroscopy of the hydroxyl radical OH(A–X)(0–0)band in the wavelength range of 306–310 nm was employed to determine absolute number densities of OH in the atmospheric helium plasma jets generated by a 2.45 GHz microwave plasma source.The effect of the addition of molecular gases N2 and O2 to He plasma jets on OH generation was studied.Optical emission spectroscopy was simultaneously employed to monitor reactive plasma species.Stark broadening of the hydrogen Balmer emission line(Hβ)was used to estimate the electron density ne in the jets.For both He/N2 and He/O2 jets,ne was estimated to be on the order of 10^15 cm^?3.The effects of plasma power and gas flow rate were also studied.With increase in N2 and O2 flow rates,ne tended to decrease.Gas temperature in the He/O2 plasma jets was elevated compared to the temperatures in the pure He and He/N2 plasma jets.The highest OH densities in the He/N2 and He/O2 plasma jets were determined to be 1.0×10^16 molecules/cm^3 at x=4 mm(from the jet orifice)and 1.8×10^16 molecules/cm^3 at x=3 mm,respectively.Electron impact dissociation of water and water ion dissociative recombination were the dominant reaction pathways,respectively,for OH formation within the jet column and in the downstream and far downstream regions.The presence of strong emissions of the N2^+ bands in both He/N2 and He/O2 plasma jets,as against the absence of the N2^+ emissions in the Ar plasma jets,suggests that the Penning ionization process is a key reaction channel leading to the formation of N2^+ in these He plasma jets.

Fault Tolerant Reconfigurable System with Dual-Module Redundancy and Dynamic Reconfiguration

To handle the effects of single event upsets（SEU）,which are common to computers in space radiation environment,a new fault-tolerant system with dual-module redundancy is proposed using dynamic reconfigurable technique of field programmable gate array（FPGA）. This system contains detection and backup alternative functions,that is,the self-detection and self-healing functions can be completed,and consequently a system design with low hardware redundancy and high resource utilization can be achieved successfully. So it can not only detect fault but also repair the fault effectively after failure. Hence,this method is especially practical to the dynamically reconfigurable computers based on FPGAs. Design methodology has been verified by Virtex-4 FPGA on Xilinx Ml403 development platform.

Simultaneous Hashing of Multiple Messages

We describe a method for efficiently hashing multiple messages of different lengths. Such computations occur in various scenarios, and one of them is when an operating system checks the integrity of its components during boot time. These tasks can gain performance by parallelizing the computations and using SIMD architectures. For such scenarios, we compare the performance of a new 4-buffers SHA-256 S-HASH implementation, to that of the standard serial hashing. Our results are measured on the 2nd Generation Intel? CoreTM Processor, and demonstrate SHA-256 processing at effectively ~5.2 Cycles per Byte, when hashing from any of the three cache levels, or from the system memory. This represents speedup by a factor of 3.42x compared to OpenSSL (1.0.1), and by 2.25x compared to the recent and faster n-SMS method. For hashing from a disk, we show an effective rate of ~6.73 Cycles/Byte, which is almost 3 times faster than OpenSSL (1.0.1) under the same conditions. These results indicate that for some usage models, SHA-256 is significantly faster than commonly perceived.

High Power, Room Temperature Terahertz Emitters Based on Dopant Transitions in 6H-Silicon Carbide

Electrically pumped high power terahertz （THz） emitters that operated above room temperature in a pulse mode were fabricated from nitrogen-doped n-type 6H-SiC. The emission spectra had peaks centered on 5 THz and 12 THz （20 meV and 50 meV） that were attributed to radiative transitions of excitons bound to nitrogen donor impurities. Due to the relatively deep binding energies of the nitrogen donors, above 100 meV, and the high thermal conductivity of the SiC substrates, the THz output power and operating temperature were significantly higher than previous dopant based emitters. With peak applied currents of a few amperes, and a top surface area of 1 mm2, the device emitted up to 0.5 mW at liquid nitrogen temperature （77 K）, and tens of microwatts up to 333 K. This result is the highest temperature of THz emission reported from impurity-based emitters.

A Limited Feedback Transmission Scheme Based on MS Compensation in the 3D MIMO System

In a three-dimensional （3D） multiple- input multiple-output （MIMO） system, the base station can use both horizontal and vertical spaces, transmitting spatial beam to users more accurately. This system has caught the attention of researchers in recent years. The existing research on the 3D MIMO technology is based on the assumption that the base station can acquire the ideal channel state information （CSI）, which is not actually the case in real systems. Therefore, this paper introduces a limited feedback transmission scheme based on mobile station （MS） compensation in the 3D MIMO system. In this scheme, the vertical antenna gain of the 3D MIMO system compensation is assigned to the MS. Two CSI-RS ports are configured at the base station, omnidirectional CSI-RS port and partial CSI-RS port. The MS can calculate the horizontal CSI and the vertical beam gain according to omnidirectional CSI-RS port and partial CSI- RS port, respectively. Partial CSI-RS resources are used to calculate the channel after being weighted by the vertical beam vector, MS selects the optimal vertical precoding vector. Simulations show that compared with the reference strategy, the transmission scheme with limited feedback based on the MS compensation proposed in this article has more advantages. The average spectral efficiency of the system and the cell edge spectral efficiency can be greatly improved.

Building a Productive Domain-Specific Cloud for Big Data Processing and Analytics Service

Cloud Computing as a disruptive technology, provides a dynamic, elastic and promising computing climate to tackle the challenges of big data processing and analytics. Hadoop and MapReduce are the widely used open source frameworks in Cloud Computing for storing and processing big data in the scalable fashion. Spark is the latest parallel computing engine working together with Hadoop that exceeds MapReduce performance via its in-memory computing and high level programming features. In this paper, we present our design and implementation of a productive, domain-specific big data analytics cloud platform on top of Hadoop and Spark. To increase user’s productivity, we created a variety of data processing templates to simplify the programming efforts. We have conducted experiments for its productivity and performance with a few basic but representative data processing algorithms in the petroleum industry. Geophysicists can use the platform to productively design and implement scalable seismic data processing algorithms without handling the details of data management and the complexity of parallelism. The Cloud platform generates a complete data processing application based on user’s kernel program and simple configurations, allocates resources and executes it in parallel on top of Spark and Hadoop.

Common Characteristics and Practices of Established Consortia

Standards are fundamental to the global economy.They are developed by a wide variety of organizations,including national,regional and international standards development organizations(SDOs),consor tia,trade associations,and other industr y groups.Successful standards provide impor tant benefits to consumers,companies,governments and other stakeholders.

Material Modeling in Semiconductor Process Applications

During the past decade,significant progress has been achieved in the application of material modeling to aid technology development in semiconductor manufacturing companies such as Intel.In this paper,we review examples of applications involving a complex set of material modeling tools and methodologies and share our perspective of the future of the area.Examples are given illustrating the landscape of useful physical models and approaches along with commentary addressing tool relevance and simulation efficiency issues.While the scope of this paper precludes providing in-depth details,references to more focused publications are shared.Finally,we outline how to approach constructing a general infrastructure for supporting TCAD material modeling applications.

Future Semiconductor Devices for Multi-Valued Logic Circuit Design

This paper introduces future devices for multi-valued logic implementation. Quantum dot gate field effect transistor (QDGFET) works based on the change in threshold voltage due to stored charge in the quantum dots in the gate region. Quantum dot channel field effect transistor (QDCFET) produces more number of states in their transfer characteristics because of charge flow through the mini-band structure formed by the overlapping energy bands of the neighboring quantum dots in the channel region of the FET. On the other hand spatial wave-function switched field effect transistor (SWSFET) produces more number of states in its transfer characteristic based on the switching of charge carriers from one channel to other channel of the device. In this paper we discuss QDGFET, QDCFET and SWSFET in detail to explore their application in future multi-valued logic circuits.

A Low Sample Size Estimator for K Distributed Noise

In this paper, we derive a new method for estimating the parameters of the K-distribution when a limited number of samples are available. The method is based on an approximation of the Bessel function of the second kind that reduces the complexity of the estimation formulas in comparison to those used by the maximum likelihood algorithm. The proposed method has better performance in comparison with existing methods of the same complexity giving a lower mean squared error when the number of samples used for the estimation is relatively low.

5G High Frequency Band Channel Modeling and Insights on System Design

There are two main opposing views in the wireless industry on the feasibility of developing 5th generation(5G) cellular networks in mm-Wave bands. The optimistic view is based on the fact that the path loss in mm Wave bands is not significantly worse than that in cellular bands when beamforming gain is also considered. The cautious view points out the significant blockage issues due to the lack of diffraction and adequate penetration in mm Wave bands. The implementation of 5G mm Wave cellular networks also faces major challenges due to the high link budget needed for long- range communication and the strong dependency on beamforming technology. This paper addresses some of these fundamental technology issues, from mm Wave channel characters and channel modeling to the implications on system and network architecture design.Although we believe that mm Wave can be used for 5G networks, we show that the air interface, device and network design will be very different from existing cellular design.

Computer Platform Adaptive Interference Cancellation Using Higher-Order Statistics

Broadband wireless interference in a computer platform is the result of multiple dynamic electromagnetic emission sources. This interference is non-Gaussian and a receiver design based on the Gaussian assumption will yield suboptimal performance. In fact, it has a double-sided K-distribution and needs to be treated differently in the design process. When dealing with this type of interference in the presence of white Gaussian noise, traditional interference/noise cancellation schemes do not produce satisfactory results. In this paper, we present an interference mitigation method which improves BER performance. We do this by using the cross-cumulant as the criterion of goodness. Specifically, our algorithm is based on higher order statistics (HOS) and is designed to reconstruct and to cancel the interference in a recursive fashion. The algorithm is tested on both BPSK and OFDM communication environments. We compare performance in terms of BER against other cancellation methods.

Performance Characterization of Parallel Game-tree Search Application Crafty

Game-tree search plays an important role in the field of Artificial Intelligence （AI）. In this paper, we characterize one parallel game-tree search workload in chess： the latest version of Crafty, a state of art program, on two Intel Xeon shared-memory multiprocessor systems. Our analysis shows that Crafty is latency-sensitive and the hash-table and dynamic tree splitting used in Crafty cause large scalability penalties. They consume 35%-50% of the running time on the 4-way system. Furthermore, Crafty is not bandwidth-limited.

Unified Coverage Methodology for SoC Post-Silicon Validation

The System-on-Chip’s increased complexity and shortened design cycle calls for innovation in design and validation. A high quality System-on-Chip creates distinction and position in the market, and validation is the key to a quality product. Validation consumes >60% of the product cycle. Therefore, validation should be carried out efficiently. Validation must be quantified to aid in determining its quality. Pre-silicon uses various coverage metrics for quantifying the validation. The available on-chip coverage logic limits the use of pre-silicon-like coverage metrics in post-silicon. Although on-chip coverage logic increases observability, it does not contribute to the functional logic;hence, they are controlled and limited. Discounting the need for the on-chip coverage logic, the question to be answered is whether or not these pre-silic-on coverage metrics applicable to post-silicon. We discuss the reasons for limited applicability of pre-silicon coverage metrics in post-silicon. This paper presents a unified SoC post-silicon coverage methodology centered on functional coverage metrics.

Effect of Chamber Conditions and Substrate Type on PECVD of SiGeSn Films

In the past studies have shown that the addition of Ge and Sn into Si lattice to form SiGeSn enhances its carrier mobility and band-gap properties. Conventionally SiGeSn epitaxial films are grown using Ultra-High Vacuum (UHV) conditions with pressures ranging from 10-8 torr to 10-10 torr which makes high volume manufacturing very expensive. On the contrary, the use of low-pressure CVD processes (vacuum levels of 10-2 torr to 10-4 torr) is economically more viable and yields faster deposition of SiGeSn films. This study outlines the use of a cost-effective Plasma Enhanced Chemical Vapor Deposition (PECVD) reactor to study the impact of substrate temperature and substrate type on the growth and properties of polycrystalline SiGeSn films. The onset of polycrystallinity in the films is attributed to the oxygen-rich PECVD chamber conditions explained using the Volmer-Weber (3D island) mechanism. The properties of the films were characterized using varied techniques to understand the impact of the substrate on film composition, thickness, crystallinity, and strain.