智能化公厕控制系统方案概述

随着人们生活水平的提高,对厕所这样的人类生理代谢环境的节水、照明及空气清新等要求越来越高.利用现代微处理控制技术、传感技术、电气控制等技术为现代智能厕所设计提供了有效的保障.本文就智能公厕控制系统方案做一简要概述,同时也可作为其它智能化厕所设计参考.

PDSOI NMOS器件激光模拟光电流效应

为获得N型金属氧化物半导体(NMOS)器件在γ射线辐照条件下的光电流特性,采用激光模拟技术,利用部分耗尽型绝缘体上硅(PDSOI)工艺NMOS器件进行激光照射试验,获得不同尺寸和拓扑结构器件在激光照射条件下光电流和激光入射能量之间的关系。利用TCAD仿真工具进行器件的光电流仿真,对比TCAD仿真与激光模拟试验数据,两组数据结果基本一致,验证了激光模拟技术的可行性和准确性。通过与理论计算得到的光电流进行对比,获得了理论计算与试验光电流之间的关系,并由此得到器件寄生双极晶体管在激光照射条件下的放大倍数。

Energy distribution extraction of negative charges responsible for positive bias temperature instability

A new method is proposed to extract the energy distribution of negative charges, which results from electron trapping by traps in the gate stack of n MOSFET during positive bias temperature instability(PBTI) stress based on the recovery measurement. In our case, the extracted energy distribution of negative charges shows an obvious dependence on energy,and the energy level of the largest energy density of negative charges is 0.01 e V above the conduction band of silicon. The charge energy distribution below that energy level shows strong dependence on the stress voltage.

Influence of ultra-thin TiN thickness(1.4 nm and 2.4 nm) on positive bias temperature instability(PBTI)of high-k/metal gate nMOSFETs with gate-last process

The positive bias temperature instability(PBTI) degradations of high-k/metal gate(HK/MG) n MOSFETs with thin Ti N capping layers(1.4 nm and 2.4 nm) are systemically investigated. In this paper, the trap energy distribution in gate stack during PBTI stress is extracted by using ramped recovery stress, and the temperature dependences of PBTI(90?C,125?C, 160?C) are studied and activation energy(Ea) values(0.13 e V and 0.15 e V) are extracted. Although the equivalent oxide thickness(EOT) values of two Ti N thickness values are almost similar(0.85 nm and 0.87 nm), the 2.4-nm Ti N one(thicker Ti N capping layer) shows better PBTI reliability(13.41% at 0.9 V, 90?C, 1000 s). This is due to the better interfacial layer/high-k(IL/HK) interface, and HK bulk states exhibited through extracting activation energy and trap energy distribution in the high-k layer.

Characterization of positive bias temperature instability of NMOSFET with high-k/metal gate last process

Positive bias temperature instability(PBTI) characteristics and degradation mechanisms of NMOSFET with high-k/metal gate last process have been systematically investigated. The time evolution of threshold voltage shift during PBTI stress still follows a power law. However, the exponent n decreases from 0.26 to 0.16 linearly as the gate stress voltage increases from 0.6 to 1.2 V. There is no interface state generation during stress because of the negligible sub-threshold swing change. Moreover, the activation energy is 0.1 e V, which implies that electrons directly tunnel into high-k bulk and are trapped by pre-existing traps resulting into PBTI degradation. During recovery the threshold voltage shift is linear in lgt, and a mathematical model is proposed to express threshold voltage shift.

Series resistance effect on time zero dielectrics breakdown characteristics of MOSCAP with ultra-thin EOT high-k/metal gate stacks

The time zero dielectric breakdown characteristics of MOSCAP with ultra-thin EOT high-k metal gate stacks are studied. The TZDB results show an abnormal area dependence due to the series resistance effect. The series resistance components extracted from the Fowler–Nordheim tunneling relation are attributed to the spreading resistance due to the asymmetry electrodes. Based on a series model to eliminate the series resistance effect, an area acceleration dependence is obtained by correcting the TZDB results. The area dependence follows Poisson area scaling rules, which indicates that the mechanism of TZDB is the same as TDDB and could be considered as a trap generation process.