目的观察针刺配合穴位贴敷治疗卒中后排便障碍的临床疗效及其对患者营养状况、肠道菌落数及肛管直肠动力学影响。方法将94例卒中后排便障碍患者随机分为观察组和对照组,每组47例。两组均接受基础治疗,观察组采用针刺配合穴位贴敷治疗,...目的观察针刺配合穴位贴敷治疗卒中后排便障碍的临床疗效及其对患者营养状况、肠道菌落数及肛管直肠动力学影响。方法将94例卒中后排便障碍患者随机分为观察组和对照组,每组47例。两组均接受基础治疗,观察组采用针刺配合穴位贴敷治疗,对照组采用单纯穴位贴敷治疗。观察两组治疗前后各项营养状况指标[转铁蛋白(transferrin,TRF)、前白蛋白(prealbumin,PA)、血清白蛋白(albumin,ALB)水平]、肠道菌落数指标[双歧杆菌、肠杆菌、乳杆菌计数及短链脂肪酸(short-chain fatty acids,SCFAs)含量]、肛管直肠动力学指标(直肠初始阈值、肛管静息压、肛管最大收缩压、直肠排便感觉阈值)、临床症状评分(排便困难、排便频率、排便时间和腹胀评分)、便秘评分系统(constipation scoring system,CSS)评分及便秘患者生活质量量表(patient assessment of constipation quality of life questionnaire,PAC-QOL)评分的变化情况,比较两组临床疗效。结果观察组总有效率为97.9%,明显高于对照组的83.0%(P<0.05)。两组治疗后各项营养状况指标、SCFAs含量及双歧杆菌、乳杆菌计数均较同组治疗前显著升高,肠杆菌计数、各项肛管直肠动力学指标、各项临床症状评分、CSS评分及PAC-QOL评分均显著降低,差异均具有统计学意义(P<0.05)。观察组治疗后各项营养状况指标、SCFAs含量及双歧杆菌、乳杆菌计数均明显高于对照组,肠杆菌计数、各项肛管直肠动力学指标、各项临床症状评分、CSS评分及PAC-QOL评分均明显低于对照组,差异均具有统计学意义(P<0.05)。结论在基础治疗的基础上,针刺配合穴位贴敷治疗卒中后排便障碍疗效确切,可改善患者营养状态、肛管直肠动力学指标和临床症状,提升SCFAs含量,调节肠道菌落微生态。展开更多
We design a reconfigurable pipelined multiplier embedded in an FPGA. This design is based on the modified Booth algorithm and performs 18 × 18 signed or 17 × 17 unsigned multiplication. We propose a novel me...We design a reconfigurable pipelined multiplier embedded in an FPGA. This design is based on the modified Booth algorithm and performs 18 × 18 signed or 17 × 17 unsigned multiplication. We propose a novel method for circuit optimization to reduce the number of partial products. A new layout floorplan design of the multiplier block is reported to comply with the constraints imposed by the tile-based FPGA chip design. The multiplier can be configured as synchronous or asynchronous. Its operation can also be configured as pipelined for high-frequency operation. This design can be easily extended for different input and output bit-widths. We employ a novel carry look-ahead adder circuit to generate the final product. The transmission-gate logic is used for the low-level circuits throughout the entire multiplier for fast logic operations. The design of the multiplier block is based on SMIC 0.13μm CMOS technology using full-custom design methodology. The operation of the 18 × 18 multiplier takes 4. lns. The two-stage pipelined operation cycle is 2.5ns. This is 29.1% faster than the commercial multiplier and is 17.5% faster than the multipliers reported in other academic designs. Compared with the distributed LUT-based multiplier,it demonstrates an area efficiency ratio of 33 ： 1.展开更多
文摘目的观察针刺配合穴位贴敷治疗卒中后排便障碍的临床疗效及其对患者营养状况、肠道菌落数及肛管直肠动力学影响。方法将94例卒中后排便障碍患者随机分为观察组和对照组,每组47例。两组均接受基础治疗,观察组采用针刺配合穴位贴敷治疗,对照组采用单纯穴位贴敷治疗。观察两组治疗前后各项营养状况指标[转铁蛋白(transferrin,TRF)、前白蛋白(prealbumin,PA)、血清白蛋白(albumin,ALB)水平]、肠道菌落数指标[双歧杆菌、肠杆菌、乳杆菌计数及短链脂肪酸(short-chain fatty acids,SCFAs)含量]、肛管直肠动力学指标(直肠初始阈值、肛管静息压、肛管最大收缩压、直肠排便感觉阈值)、临床症状评分(排便困难、排便频率、排便时间和腹胀评分)、便秘评分系统(constipation scoring system,CSS)评分及便秘患者生活质量量表(patient assessment of constipation quality of life questionnaire,PAC-QOL)评分的变化情况,比较两组临床疗效。结果观察组总有效率为97.9%,明显高于对照组的83.0%(P<0.05)。两组治疗后各项营养状况指标、SCFAs含量及双歧杆菌、乳杆菌计数均较同组治疗前显著升高,肠杆菌计数、各项肛管直肠动力学指标、各项临床症状评分、CSS评分及PAC-QOL评分均显著降低,差异均具有统计学意义(P<0.05)。观察组治疗后各项营养状况指标、SCFAs含量及双歧杆菌、乳杆菌计数均明显高于对照组,肠杆菌计数、各项肛管直肠动力学指标、各项临床症状评分、CSS评分及PAC-QOL评分均明显低于对照组,差异均具有统计学意义(P<0.05)。结论在基础治疗的基础上,针刺配合穴位贴敷治疗卒中后排便障碍疗效确切,可改善患者营养状态、肛管直肠动力学指标和临床症状,提升SCFAs含量,调节肠道菌落微生态。
文摘We design a reconfigurable pipelined multiplier embedded in an FPGA. This design is based on the modified Booth algorithm and performs 18 × 18 signed or 17 × 17 unsigned multiplication. We propose a novel method for circuit optimization to reduce the number of partial products. A new layout floorplan design of the multiplier block is reported to comply with the constraints imposed by the tile-based FPGA chip design. The multiplier can be configured as synchronous or asynchronous. Its operation can also be configured as pipelined for high-frequency operation. This design can be easily extended for different input and output bit-widths. We employ a novel carry look-ahead adder circuit to generate the final product. The transmission-gate logic is used for the low-level circuits throughout the entire multiplier for fast logic operations. The design of the multiplier block is based on SMIC 0.13μm CMOS technology using full-custom design methodology. The operation of the 18 × 18 multiplier takes 4. lns. The two-stage pipelined operation cycle is 2.5ns. This is 29.1% faster than the commercial multiplier and is 17.5% faster than the multipliers reported in other academic designs. Compared with the distributed LUT-based multiplier,it demonstrates an area efficiency ratio of 33 ： 1.
