After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitti...After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitting energy between light and heavy hole bands. The results show that the valance bands are highly distorted, and the anisotropy is more obvious. To obtain the density of states （DOS） effective mass, which is a very important parameter for device modeling, a DOS effective mass model of biaxial tensile strained Si is constructed based on the valance band calculation. This model can be directly used in the device model of metal-oxide semiconductor field effect transistor （MOSFET）. It also a provides valuable reference for biaxial tensile strained silicon MOSFET design.展开更多
The fringing-induced barrier lowering（FIBL） effect of sub-100 nm MOSFETs with high-k gate dielectrics is investigated using a two-dimensional device simulator.An equivalent capacitance theory is proposed to explain ...The fringing-induced barrier lowering（FIBL） effect of sub-100 nm MOSFETs with high-k gate dielectrics is investigated using a two-dimensional device simulator.An equivalent capacitance theory is proposed to explain the physics mechanism of the FIBL effect.The FIBL effect is enhanced and the short channel performance is degraded with increasing capacitance.Based on equivalent capacitance theory,the influences of channel length,junction depth,gate/lightly doped drain（LDD） overlap length,spacer material and spacer width on FIBL is thoroughly investigated.A stack gate dielectric is presented to suppress the FIBL effect.展开更多
We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overl...We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson＇s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.展开更多
本文研究了原子层化学气相淀积ALCVD(atom layer chemical vapor deposition)方法淀积的HfO2/SiO2/p-SiMOS电容的电特性.高频时,积累电容出现了频率色散现象.针对双频C-V法测量超薄HfO2/SiO2堆栈栅MOS电容中制备工艺和测量设备引入的寄...本文研究了原子层化学气相淀积ALCVD(atom layer chemical vapor deposition)方法淀积的HfO2/SiO2/p-SiMOS电容的电特性.高频时,积累电容出现了频率色散现象.针对双频C-V法测量超薄HfO2/SiO2堆栈栅MOS电容中制备工艺和测量设备引入的寄生效应,给出了改进的等效电路模型,消除了频率色散.研究发现,高k介质中存在的缺陷和SiO2/Si处的界面态,使高频C-V特性发生漂移.对禁带中界面态的分布进行归纳,得到C-V曲线形变的规律.研究了形变的C-V曲线与理想C-V特性的偏离,给出了界面态电荷密度的分布,得到了相对于实测C-V曲线的矫正线.通过比较理想C-V曲线和矫正线,提取了平带电压、栅氧化层电荷、SiO2/Si界面的界面态密度等典型的电学参数.展开更多
基金supported by the National Natural Science Foundation of China (Grant Nos. 60976068 and 60936005)the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China (Grant No. 78083)
文摘After constructing a stress and strain model, the valence bands of in-plane biaxial tensile strained Si is calculated by k·p method. In the paper we calculate the accurate anisotropy valance bands and the splitting energy between light and heavy hole bands. The results show that the valance bands are highly distorted, and the anisotropy is more obvious. To obtain the density of states （DOS） effective mass, which is a very important parameter for device modeling, a DOS effective mass model of biaxial tensile strained Si is constructed based on the valance band calculation. This model can be directly used in the device model of metal-oxide semiconductor field effect transistor （MOSFET）. It also a provides valuable reference for biaxial tensile strained silicon MOSFET design.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.60936005 and 61076097)the Cultivation Fund of the Key Scientific and Technical Innovation Project of Ministry of Education of China(Grant No.708083)the Fundamental Research Funds for the Central Universities,China(Grant No.20110203110012)
文摘The fringing-induced barrier lowering（FIBL） effect of sub-100 nm MOSFETs with high-k gate dielectrics is investigated using a two-dimensional device simulator.An equivalent capacitance theory is proposed to explain the physics mechanism of the FIBL effect.The FIBL effect is enhanced and the short channel performance is degraded with increasing capacitance.Based on equivalent capacitance theory,the influences of channel length,junction depth,gate/lightly doped drain（LDD） overlap length,spacer material and spacer width on FIBL is thoroughly investigated.A stack gate dielectric is presented to suppress the FIBL effect.
基金Project supported by the National Natural Science Foundation of China(Grant Nos.60936005 and 61076097)the Cultivation Fund of the Key Scientific and Technical Innovation Project,Ministry of Education of China(Grant No.708083)the Fundamental Research Funds for the Central Universities of China(Grant No.20110203110012)
文摘We investigate the influence of voltage drop across the lightly doped drain（LDD） region and the built-in potential on MOSFETs,and develop a threshold voltage model for high-k gate dielectric MOSFETs with fully overlapped LDD structures by solving the two-dimensional Poisson＇s equation in the silicon and gate dielectric layers.The model can predict the fringing-induced barrier lowering effect and the short channel effect.It is also valid for non-LDD MOSFETs.Based on this model,the relationship between threshold voltage roll-off and three parameters,channel length,drain voltage and gate dielectric permittivity,is investigated.Compared with the non-LDD MOSFET,the LDD MOSFET depends slightly on channel length,drain voltage,and gate dielectric permittivity.The model is verified at the end of the paper.
文摘本文研究了原子层化学气相淀积ALCVD(atom layer chemical vapor deposition)方法淀积的HfO2/SiO2/p-SiMOS电容的电特性.高频时,积累电容出现了频率色散现象.针对双频C-V法测量超薄HfO2/SiO2堆栈栅MOS电容中制备工艺和测量设备引入的寄生效应,给出了改进的等效电路模型,消除了频率色散.研究发现,高k介质中存在的缺陷和SiO2/Si处的界面态,使高频C-V特性发生漂移.对禁带中界面态的分布进行归纳,得到C-V曲线形变的规律.研究了形变的C-V曲线与理想C-V特性的偏离,给出了界面态电荷密度的分布,得到了相对于实测C-V曲线的矫正线.通过比较理想C-V曲线和矫正线,提取了平带电压、栅氧化层电荷、SiO2/Si界面的界面态密度等典型的电学参数.
