Anisotropic evolution of the step edges on the compressive-strained In0.2Ga0.8As/GaAs（001） surface has been investigated by scanning tunneling microscopy （STM）. The experiments suggest that step edges are indeed s...Anisotropic evolution of the step edges on the compressive-strained In0.2Ga0.8As/GaAs（001） surface has been investigated by scanning tunneling microscopy （STM）. The experiments suggest that step edges are indeed sinuous and protrude somewhere a little way along the [110] direction, which is different from the classical waviness predicted by the theoretical model. We consider that the monatomic step edges undergo a morphological instability induced by the anisotropic diffusion of adatoms on the terrace during annealing, and we improve a kinetic model of step edge based on the classical Burton Cabrer-Frank （BCF） model in order to determine the normal velocity of step enlargement. The results show that the normal velocity is proportional to the arc length of the peninsula, which is consistent with the first result of our kinetic model. Additionally, a significant phenomenon is an excess elongation along the [110] direction at the top of the peninsula with a higher aspect ratio, which is attributed to the restriction of diffusion lengths.展开更多
Surface segregation is studied via the evolution of reflection high-energy electron diffraction （RHEED） patterns under different values of As4 BEP for InGaAs films. When the As4 BEP is set to be zero, the RHEED patt...Surface segregation is studied via the evolution of reflection high-energy electron diffraction （RHEED） patterns under different values of As4 BEP for InGaAs films. When the As4 BEP is set to be zero, the RHEED pattern keeps a 4x3/（nx3） structure with increasing temperature, and surface segregation takes place until 470 ℃ The RHEED pattern develops into a metal-rich （4x2） structure as temperature increases to 495℃. The reason for this is that surface segregation makes the In inside the InGaAs film climb to its surface. With the temperature increasing up to 515℃, the RHEED pattern turns into a GaAs（2x4） structure due to In desorption. While the As4 BEP comes up to a specific value （1.33 x 10-4 Pa-1.33 x 10-3 Pa）, the surface temperature can delay the segregation and desorption. We find that As4 BEP has a big influence on surface desorption, while surface segregation is more strongly dependent on temperature than surface desorption.展开更多
InA1As/InGaAs high electron mobility transistors （HEMTs） on an InP substrate with well-balanced cutoff frequency fT and maximum oscillation frequency frnax are reported. An InA1As/InGaAs HEMT with 100-nm gate length...InA1As/InGaAs high electron mobility transistors （HEMTs） on an InP substrate with well-balanced cutoff frequency fT and maximum oscillation frequency frnax are reported. An InA1As/InGaAs HEMT with 100-nm gate length and gate width of 2 × 50 μm shows excellent DC characteristics, including full channel current of 724 mA/mm, extrinsic maximum transconductance gm.max of 1051 mS/mm, and drain-gate breakdown voltage BVDG of 5.92 V. In addition, this device exhibits fT = 249 GHz and fmax = 415 GHz. These results were obtained by fabricating an asymmetrically recessed gate and minimizing the parasitic resistances. The specific Ohmic contact resistance was reduced to 0.031 0.mm. Moreover, the fT obtained in this work is the highest ever reported in 100-nm gate length InA1As/InGaAs InP-based HEMTs. The outstanding gm.max, fT, fmax, and good BVDG make the device suitable for applications in low noise amplifiers, power amplifiers, and high speed circuits.展开更多
In order to predict the actual quantity of non-bulk GaAs layers after long-time homoepitaxy on GaAs （001） by theo- retical calculation, a half-terrace diffusion model based on thermodynamics is used to calculate the...In order to predict the actual quantity of non-bulk GaAs layers after long-time homoepitaxy on GaAs （001） by theo- retical calculation, a half-terrace diffusion model based on thermodynamics is used to calculate the ripening time of GaAs layers to form a fiat morphology in annealing. To verify the accuracy of the calculation, real space scanning tunneling microscopy images of GaAs surface after different annealing times are obtained and the roughness of the GaAs surface is measured. The results suggest that the half terrace model is an accurate method with a relative error of about 4.1%.展开更多
基金Project supported by the National Natural Science Foundation of China （Grant No. 60866001）, the Special Project for Senior Researcher of Guizhou Organization Department （Grnat No. TZJF 2006.10）, Doctor Foundation of Guizhou University, the Innovation Fund of Guizhou University （Grant No. 2011008）, the Science and Technological Project for Scholar Abroad, Guizhou Province （Grant No. [2007]03）, and the Guizhou Science and Technology Foundation （Grant No. J[200712176）.
文摘Anisotropic evolution of the step edges on the compressive-strained In0.2Ga0.8As/GaAs（001） surface has been investigated by scanning tunneling microscopy （STM）. The experiments suggest that step edges are indeed sinuous and protrude somewhere a little way along the [110] direction, which is different from the classical waviness predicted by the theoretical model. We consider that the monatomic step edges undergo a morphological instability induced by the anisotropic diffusion of adatoms on the terrace during annealing, and we improve a kinetic model of step edge based on the classical Burton Cabrer-Frank （BCF） model in order to determine the normal velocity of step enlargement. The results show that the normal velocity is proportional to the arc length of the peninsula, which is consistent with the first result of our kinetic model. Additionally, a significant phenomenon is an excess elongation along the [110] direction at the top of the peninsula with a higher aspect ratio, which is attributed to the restriction of diffusion lengths.
基金supported by the National Natural Science Foundation of China (Grant No. 60866001)the Special Assistant to High-Level Personnel Research Projects of Guizhou Provincial Party Committee Organization Department of China (Grant No. TZJF- 2008-31)+3 种基金the Support Plan of New Century Excellent Talents of Ministry of Education, China (Grant No. NCET-08-0651)the Doctorate Foundation of the State Education Ministry of China (Grant No. 20105201110003)the Special Governor Fund of Outstanding Professionals in Science and Technology and Education of Guizhou Province, China (Grant No. 2009114)the Doctoral Foundation Projects of Guizhou College of Finance and Economics in 2010
文摘Surface segregation is studied via the evolution of reflection high-energy electron diffraction （RHEED） patterns under different values of As4 BEP for InGaAs films. When the As4 BEP is set to be zero, the RHEED pattern keeps a 4x3/（nx3） structure with increasing temperature, and surface segregation takes place until 470 ℃ The RHEED pattern develops into a metal-rich （4x2） structure as temperature increases to 495℃. The reason for this is that surface segregation makes the In inside the InGaAs film climb to its surface. With the temperature increasing up to 515℃, the RHEED pattern turns into a GaAs（2x4） structure due to In desorption. While the As4 BEP comes up to a specific value （1.33 x 10-4 Pa-1.33 x 10-3 Pa）, the surface temperature can delay the segregation and desorption. We find that As4 BEP has a big influence on surface desorption, while surface segregation is more strongly dependent on temperature than surface desorption.
基金Project supported by the National Basic Research Program of China(Grant No.2010CB327502)
文摘InA1As/InGaAs high electron mobility transistors （HEMTs） on an InP substrate with well-balanced cutoff frequency fT and maximum oscillation frequency frnax are reported. An InA1As/InGaAs HEMT with 100-nm gate length and gate width of 2 × 50 μm shows excellent DC characteristics, including full channel current of 724 mA/mm, extrinsic maximum transconductance gm.max of 1051 mS/mm, and drain-gate breakdown voltage BVDG of 5.92 V. In addition, this device exhibits fT = 249 GHz and fmax = 415 GHz. These results were obtained by fabricating an asymmetrically recessed gate and minimizing the parasitic resistances. The specific Ohmic contact resistance was reduced to 0.031 0.mm. Moreover, the fT obtained in this work is the highest ever reported in 100-nm gate length InA1As/InGaAs InP-based HEMTs. The outstanding gm.max, fT, fmax, and good BVDG make the device suitable for applications in low noise amplifiers, power amplifiers, and high speed circuits.
基金Project supported by the National Natural Science Foundation of China(Grant No.60866001)the Doctorate Foundation of the Education Ministry of China(Grant No.20105201110003)
文摘In order to predict the actual quantity of non-bulk GaAs layers after long-time homoepitaxy on GaAs （001） by theo- retical calculation, a half-terrace diffusion model based on thermodynamics is used to calculate the ripening time of GaAs layers to form a fiat morphology in annealing. To verify the accuracy of the calculation, real space scanning tunneling microscopy images of GaAs surface after different annealing times are obtained and the roughness of the GaAs surface is measured. The results suggest that the half terrace model is an accurate method with a relative error of about 4.1%.
