氢是一种良好的载能体。自LH_2广泛应用于航天事业以来,世界各国对氢的生产、贮存、运输、应用、分配、安全技术和经济性等方面的研究均巳取得了重大的成就。由于世界矿物燃料终将耗尽,因而越来越多的人将注意力转向了氢,他们意识到氢...氢是一种良好的载能体。自LH_2广泛应用于航天事业以来,世界各国对氢的生产、贮存、运输、应用、分配、安全技术和经济性等方面的研究均巳取得了重大的成就。由于世界矿物燃料终将耗尽,因而越来越多的人将注意力转向了氢,他们意识到氢具有作为未来燃料的潜力。如世界氢能会议(WHEC)第六届会议的副标题为“Transition to Hydrogen”,到1988年的第七届会议副标题改为“Hydrogen Today”,可见世界已把氢能提高到了非常重要的地位。在许多可供替换的燃料中。展开更多
Agile hardware development methodology has been widely adopted over the past decade.Despite the research progress,the industry still doubts its applicability,especially for the functional verification of complicated p...Agile hardware development methodology has been widely adopted over the past decade.Despite the research progress,the industry still doubts its applicability,especially for the functional verification of complicated processor chips.Functional verification commonly employs a simulation-based method of co-simulating the design under test with a reference model and checking the consistency of their outcomes given the same input stimuli.We observe limited collaboration and information exchange through the design and verification processes,dramatically leading to inefficiencies when applying the conventional functional verification workflow to agile development.In this paper,we propose workflow integration with collaborative task delegation and dynamic information exchange as the design principles to effectively address the challenges on functional verification under the agile development model.Based on workflow integration,we enhance the functional verification workflows with a series of novel methodologies and toolchains.The diff-rule based agile verification methodology(DRAV)reduces the overhead of building reference models with runtime execution information from designs under test.We present the RISC-V implementation for DRAV,DiffTest,which adopts information probes to extract internal design behaviors for co-simulation and debugging.It further integrates two plugins,namely XFUZZ for effective test generation guided by design coverage metrics and LightSSS for efficient fault analysis triggered by co-simulation mismatches.We present the integrated workflows for agile hardware development and demonstrate their effectiveness in designing and verifying RISC-V processors with 33 functional bugs found in NutShell.We also illustrate the efficiency of the proposed toolchains with a case study on a functional bug in the L2 cache of XiangShan.展开更多
文摘氢是一种良好的载能体。自LH_2广泛应用于航天事业以来,世界各国对氢的生产、贮存、运输、应用、分配、安全技术和经济性等方面的研究均巳取得了重大的成就。由于世界矿物燃料终将耗尽,因而越来越多的人将注意力转向了氢,他们意识到氢具有作为未来燃料的潜力。如世界氢能会议(WHEC)第六届会议的副标题为“Transition to Hydrogen”,到1988年的第七届会议副标题改为“Hydrogen Today”,可见世界已把氢能提高到了非常重要的地位。在许多可供替换的燃料中。
基金supported in part by the Strategic Priority Research Program of Chinese Academy of Sciences(CAS)under Grant No.XDC05030200the National Key Research and Development Program of China under Grant No.2022YFB4500403+2 种基金the National Natural Science Foundation of China under Grant Nos.62090022 and 62172388the Youth Innovation Promotion Association of the Chinese Academy of Sciences under Grant No.2020105the Innovation Grant No.E261100 by Institute of Computing Technology,Chinese Academy of Sciences.
文摘Agile hardware development methodology has been widely adopted over the past decade.Despite the research progress,the industry still doubts its applicability,especially for the functional verification of complicated processor chips.Functional verification commonly employs a simulation-based method of co-simulating the design under test with a reference model and checking the consistency of their outcomes given the same input stimuli.We observe limited collaboration and information exchange through the design and verification processes,dramatically leading to inefficiencies when applying the conventional functional verification workflow to agile development.In this paper,we propose workflow integration with collaborative task delegation and dynamic information exchange as the design principles to effectively address the challenges on functional verification under the agile development model.Based on workflow integration,we enhance the functional verification workflows with a series of novel methodologies and toolchains.The diff-rule based agile verification methodology(DRAV)reduces the overhead of building reference models with runtime execution information from designs under test.We present the RISC-V implementation for DRAV,DiffTest,which adopts information probes to extract internal design behaviors for co-simulation and debugging.It further integrates two plugins,namely XFUZZ for effective test generation guided by design coverage metrics and LightSSS for efficient fault analysis triggered by co-simulation mismatches.We present the integrated workflows for agile hardware development and demonstrate their effectiveness in designing and verifying RISC-V processors with 33 functional bugs found in NutShell.We also illustrate the efficiency of the proposed toolchains with a case study on a functional bug in the L2 cache of XiangShan.
