A novel lateral double-diffused metal–oxide semiconductor（LDMOS） with a high breakdown voltage（BV） and low specific on-resistance（Ron.sp） is proposed and investigated by simulation. It features a junction field...A novel lateral double-diffused metal–oxide semiconductor（LDMOS） with a high breakdown voltage（BV） and low specific on-resistance（Ron.sp） is proposed and investigated by simulation. It features a junction field plate（JFP） over the drift region and a partial N-buried layer（PNB） in the P-substrate. The JFP not only smoothes the surface electric field（E-field）, but also brings in charge compensation between the JFP and the N-drift region, which increases the doping concentration of the N-drift region. The PNB reshapes the equipotential contours, and thus reduces the E-field peak on the drain side and increases that on the source side. Moreover, the PNB extends the depletion width in the substrate by introducing an additional vertical diode, resulting in a significant improvement on the vertical BV. Compared with the conventional LDMOS with the same dimensional parameters, the novel LDMOS has an increase in BV value by 67.4%,and a reduction in Ron.sp by 45.7% simultaneously.展开更多
A novel silicon-on-insulator（SOI） super-junction（SJ） LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features： an assisted-accumulation trench-type extending gate（TEG） with a h...A novel silicon-on-insulator（SOI） super-junction（SJ） LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features： an assisted-accumulation trench-type extending gate（TEG） with a high-k（HK） dielectric and a step-dopedN pillar（TEG-SD SJ LDMOS）. In the on-state, electrons accumulate at the sidewall of the HK dielectric from the source to the drain by the TEG. Furthermore, the high permittivity of the HK dielectric leads to an ultra-strong charge accumulation effect. As a result, an ultra-low resistance current path is formed. The specific on-resistance（Ron;sp/ is thus greatly reduced and is independent of the drift doping concentration. In the off-state, the step-dopedN pillar effectively suppresses the substrate-assisted depletion effect by charge compensation. Moreover, the reshape effect of the HK dielectric and the new electric field（E-field） peak introduced by the step-dopedN pillar enhance the drift region E-field. Hence, the BV is improved. Simulation indicates that the TEG-SD SJ LDMOS achieves an extremely low Ron;sp of 1.06 m cm^2 and a BV of 217 V. Compared with the conventional SJ LDMOS, the TEG-SD SJ LDMOS decreases the Ron;sp by 77.5% and increases the BV by 33%,exhibiting a high figure of merits（FOM=BV^2/Ron;sp/ of 44 MW/cm^2.展开更多
A RESURF-enhanced high voltage SOl LDMOS （ER-LDMOS） with an ultralow specific on-resistance （Ron, sp） is proposed. The device features an oxide trench in the drift region, a P-pillar at the sidewall of the trench,...A RESURF-enhanced high voltage SOl LDMOS （ER-LDMOS） with an ultralow specific on-resistance （Ron, sp） is proposed. The device features an oxide trench in the drift region, a P-pillar at the sidewall of the trench, and a buried P-layer （BPL） under the trench. First, the P-pillar adjacent to the P-body not only acts as a vertical junction termination extension （JTE）, but also forms a vertical reduced surface field （RESURF） structure with the N- drift region. Both of them optimize the bulk electric field distributions and increase the doping concentration of the drift region. Second, the BPL together with the N-drift region and the buried oxide layer （BOX） exhibits a triple- RESURF effect, which further improves the bulk field distributions and the doping concentration. Additionally, multiple-directional depletion is induced owing to the P-pillar, the BPL, and two MIS-like structures consisting of the N-drift region combined with the oxide trench and the BOX. As a result, a significantly enhanced-RESURF effect is achieved, leading to a high breakdown voltage （BV） and a low Ron, sp. Moreover, the oxide trench folds the drift region in the vertical direction, resulting in a reduced cell pitch and thus Ron, sp. Simulated results show that the ER-LDMOS improves BV by 67% and reduces Ron, sp by 91% compared with the conventional trench LDMOS at the same cell pitch.展开更多
基金Project supported by the National Natural Science Foundation of China(Grant No.61376079)the Program for New Century Excellent Talents in University of Ministry of Education of China(Grant No.NCET-11-0062)the Postdoctoral Science Foundation of China(Grant Nos.2012T50771 and XM2012004)
文摘A novel lateral double-diffused metal–oxide semiconductor（LDMOS） with a high breakdown voltage（BV） and low specific on-resistance（Ron.sp） is proposed and investigated by simulation. It features a junction field plate（JFP） over the drift region and a partial N-buried layer（PNB） in the P-substrate. The JFP not only smoothes the surface electric field（E-field）, but also brings in charge compensation between the JFP and the N-drift region, which increases the doping concentration of the N-drift region. The PNB reshapes the equipotential contours, and thus reduces the E-field peak on the drain side and increases that on the source side. Moreover, the PNB extends the depletion width in the substrate by introducing an additional vertical diode, resulting in a significant improvement on the vertical BV. Compared with the conventional LDMOS with the same dimensional parameters, the novel LDMOS has an increase in BV value by 67.4%,and a reduction in Ron.sp by 45.7% simultaneously.
基金Project supported by the National Natural Science Foundation of China(Nos.61176069,61376079)the Program for New Century Excellent Talents in University of Ministry of Education of China(No.NCET-11-0062)
文摘A novel silicon-on-insulator（SOI） super-junction（SJ） LDMOS with an ultra-strong charge accumulation effect is proposed. It has two key features： an assisted-accumulation trench-type extending gate（TEG） with a high-k（HK） dielectric and a step-dopedN pillar（TEG-SD SJ LDMOS）. In the on-state, electrons accumulate at the sidewall of the HK dielectric from the source to the drain by the TEG. Furthermore, the high permittivity of the HK dielectric leads to an ultra-strong charge accumulation effect. As a result, an ultra-low resistance current path is formed. The specific on-resistance（Ron;sp/ is thus greatly reduced and is independent of the drift doping concentration. In the off-state, the step-dopedN pillar effectively suppresses the substrate-assisted depletion effect by charge compensation. Moreover, the reshape effect of the HK dielectric and the new electric field（E-field） peak introduced by the step-dopedN pillar enhance the drift region E-field. Hence, the BV is improved. Simulation indicates that the TEG-SD SJ LDMOS achieves an extremely low Ron;sp of 1.06 m cm^2 and a BV of 217 V. Compared with the conventional SJ LDMOS, the TEG-SD SJ LDMOS decreases the Ron;sp by 77.5% and increases the BV by 33%,exhibiting a high figure of merits（FOM=BV^2/Ron;sp/ of 44 MW/cm^2.
基金Project supported by the National Natural Science Foundation of China(Nos.61176069,61376079)
文摘A RESURF-enhanced high voltage SOl LDMOS （ER-LDMOS） with an ultralow specific on-resistance （Ron, sp） is proposed. The device features an oxide trench in the drift region, a P-pillar at the sidewall of the trench, and a buried P-layer （BPL） under the trench. First, the P-pillar adjacent to the P-body not only acts as a vertical junction termination extension （JTE）, but also forms a vertical reduced surface field （RESURF） structure with the N- drift region. Both of them optimize the bulk electric field distributions and increase the doping concentration of the drift region. Second, the BPL together with the N-drift region and the buried oxide layer （BOX） exhibits a triple- RESURF effect, which further improves the bulk field distributions and the doping concentration. Additionally, multiple-directional depletion is induced owing to the P-pillar, the BPL, and two MIS-like structures consisting of the N-drift region combined with the oxide trench and the BOX. As a result, a significantly enhanced-RESURF effect is achieved, leading to a high breakdown voltage （BV） and a low Ron, sp. Moreover, the oxide trench folds the drift region in the vertical direction, resulting in a reduced cell pitch and thus Ron, sp. Simulated results show that the ER-LDMOS improves BV by 67% and reduces Ron, sp by 91% compared with the conventional trench LDMOS at the same cell pitch.
