The speed performance and static power dissipation of the ultra-thin-body （UTB） MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width （Lsp） and sil...The speed performance and static power dissipation of the ultra-thin-body （UTB） MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width （Lsp） and silicon film thickness （tsi） are two independent parameters that influence the speed and static power dissipation of UTB siliconon-insulator （SOI） MOSFETs respectively, which can result in great design flexibility. Based on the different effects of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is proposed. The optimal design regions of tsi and Lsp for low operating power and high performance logic applications are given, which may shed light on the design of UTB SOI MOSFETs.展开更多
In this paper, a method to fabricate Silicon-on-Nothing （SON） MOSFETs using H^＋ and He^＋ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been exp...In this paper, a method to fabricate Silicon-on-Nothing （SON） MOSFETs using H^＋ and He^＋ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been experimentally demonstrated. SON MOSFETs with 50nm gate length have been fabricated. Compared with the corresponding bulk MOSFETs, the SON MOSFETs show higher on current, reduced leakage current and lower subthreshold slope.展开更多
基金Project supported by the National Natural Science Foundation of China （Grant No 60625403）, the State Key Development Program for Basic Research of China （Grant No 2006CB302701）.
文摘The speed performance and static power dissipation of the ultra-thin-body （UTB） MOSFETs have been comprehensively investigated, with both DC and AC behaviours considered. Source/drain extension width （Lsp） and silicon film thickness （tsi） are two independent parameters that influence the speed and static power dissipation of UTB siliconon-insulator （SOI） MOSFETs respectively, which can result in great design flexibility. Based on the different effects of physical and geometric parameters on device characteristics, a method to alleviate the contradiction between power dissipated and speed of UTB SOI MOSFETs is proposed. The optimal design regions of tsi and Lsp for low operating power and high performance logic applications are given, which may shed light on the design of UTB SOI MOSFETs.
基金Project supported by National Natural Science Foundation of China （Grant No 90207004） and State Key Fundamental Research Project of China.
文摘In this paper, a method to fabricate Silicon-on-Nothing （SON） MOSFETs using H^＋ and He^＋ co-implantation is presented. The technique is compatible with conventional CMOS technology and its feasibility has been experimentally demonstrated. SON MOSFETs with 50nm gate length have been fabricated. Compared with the corresponding bulk MOSFETs, the SON MOSFETs show higher on current, reduced leakage current and lower subthreshold slope.
