335 GHz非平衡式肖特基二极管三倍频器

基于混合集成的方式,采用对称锥形渐变线匹配结构设计了335 GHz非平衡式三倍频器。在保证单模传输的条件下,该匹配结构不仅能够固定二极管位置,而且可以增大匹配效果,解决了高频段倍频器3 dB带宽较窄的问题。实测结果表明,该倍频器在330~356 GHz频率范围内输出功率均大于5 mW。驱动功率为220 mW时,有最高输出功率11.2 mW,由它作为核心器件组成的固态太赫兹本振源,能够驱动超外差接收机中670 GHz二次谐波混频器。

Improvements in reverse breakdown characteristics of THz GaAs Schottky barrier varactor based on metal-brim structure

The excellent reverse breakdown characteristics of Schottky barrier varactor(SBV)are crucially required for the application of high power and high efficiency multipliers.The SBV with a novel Schottky structure named metal-brim is fabricated and systemically evaluated.Compared with normal structure,the reverse breakdown voltage of the new type SBV improves from-7.31 V to-8.75 V.The simulation of the Schottky metal-brim SBV is also proposed.Three factors,namely distribution of leakage current,the electric field,and the area of space charge region are mostly concerned to explain the physical mechanism.Schottky metal-brim structure is a promising approach to improve the reverse breakdown voltage and reduce leakage current by eliminating the accumulation of charge at Schottky electrode edge.

Influence of ultra-thin TiN thickness(1.4 nm and 2.4 nm) on positive bias temperature instability(PBTI)of high-k/metal gate nMOSFETs with gate-last process

The positive bias temperature instability(PBTI) degradations of high-k/metal gate(HK/MG) n MOSFETs with thin Ti N capping layers(1.4 nm and 2.4 nm) are systemically investigated. In this paper, the trap energy distribution in gate stack during PBTI stress is extracted by using ramped recovery stress, and the temperature dependences of PBTI(90?C,125?C, 160?C) are studied and activation energy(Ea) values(0.13 e V and 0.15 e V) are extracted. Although the equivalent oxide thickness(EOT) values of two Ti N thickness values are almost similar(0.85 nm and 0.87 nm), the 2.4-nm Ti N one(thicker Ti N capping layer) shows better PBTI reliability(13.41% at 0.9 V, 90?C, 1000 s). This is due to the better interfacial layer/high-k(IL/HK) interface, and HK bulk states exhibited through extracting activation energy and trap energy distribution in the high-k layer.

Optimization of terahertz monolithic integrated frequency multiplier based on trap-assisted physics model of THz Schottky barrier varactor

The optimization of high power terahertz monolithic integrated circuit (TMIC) is systemically studied based on the physical model of the Schottky barrier varactor (SBV) with interface defects and tunneling effect. An ultra-thin dielectric layer is added to describe the extra tunneling effect and the damping of thermionic emission current induced by the interface defects. Power consumption of the dielectric layer results in the decrease of capacitance modulation ration (Cmax/Cmin), and thus leads to poor nonlinear C–V characteristics. The proposed Schottky metal-brim (SMB) terminal structure could improve the capacitance modulation ration by reducing the influence of the interface charge and eliminating the fringing capacitance effect. Finally, a 215 GHz tripler TMIC is fabricated based on the SMB terminal structure. The output power is above 5 mW at 210–218 GHz and the maximum could exceed 10 mW at 216 GHz, which could be widely used in terahertz imaging, radiometers, and so on. This paper also provides theoretical support for the SMB structure to optimize the TMIC performance.

Stress-induced leakage current characteristics of PMOS fabricated by a new multi-deposition multi-annealing technique with full gate last process

In the process of high-k films fabrication, a novel multi deposition multi annealing(MDMA) technique is introduced to replace simple post deposition annealing. The leakage current decreases with the increase of the post deposition annealing(PDA) times. The equivalent oxide thickness(EOT) decreases when the annealing time(s) change from 1 to 2. Furthermore,the characteristics of SILC(stress-induced leakage current) for an ultra-thin SiO_2/HfO_2 gate dielectric stack are studied systematically. The increase of the PDA time(s) from 1 to 2 can decrease the defect and defect generation rate in the HK layer. However, increasing the PDA times to 4 and 7 may introduce too much oxygen, therefore the type of oxygen vacancy changes.

Temperature- and voltage-dependent trap generation model in high-k metal gate MOS device with percolation simulation

High-k metal gate stacks are being used to suppress the gate leakage due to tunneling for sub-45 nm technology nodes.The reliability of thin dielectric films becomes a limitation to device manufacturing,especially to the breakdown characteristic.In this work,a breakdown simulator based on a percolation model and the kinetic Monte Carlo method is set up,and the intrinsic relation between time to breakdown and trap generation rate R is studied by TDDB simulation.It is found that all degradation factors,such as trap generation rate time exponent m,Weibull slope β and percolation factor s,each could be expressed as a function of trap density time exponent α.Based on the percolation relation and power law lifetime projection,a temperature related trap generation model is proposed.The validity of this model is confirmed by comparing with experiment results.For other device and material conditions,the percolation relation provides a new way to study the relationship between trap generation and lifetime projection.

Study on influences of TiN capping layer on time-dependent dielectric breakdown characteristic of ultra-thin EOT high-k metal gate NMOSFET with kMC TDDB simulations

The thickness effect of the TiN capping layer on the time dependent dielectric breakdown(TDDB) characteristic of ultra-thin EOT high-k metal gate NMOSFET is investigated in this paper.Based on experimental results,it is found that the device with a thicker TiN layer has a more promising reliability characteristic than that with a thinner TiN layer.From the charge pumping measurement and secondary ion mass spectroscopy(SIMS) analysis,it is indicated that the sample with the thicker TiN layer introduces more Cl passivation at the IL/Si interface and exhibits a lower interface trap density.In addition,the influences of interface and bulk trap density ratio N_(it)/N_(ot) are studied by TDDB simulations through combining percolation theory and the kinetic Monte Carlo(kMC) method.The lifetime reduction and Weibull slope lowering are explained by interface trap effects for TiN capping layers with different thicknesses.

Influence of multi-deposition multi-annealing on time-dependent dielectric breakdown characteristics of PMOS with high-k/metal gate last process

A multi-deposition multi-annealing technique(MDMA) is introduced into the process of high-k/metal gate MOSFET for the gate last process to effectively reduce the gate leakage and improve the device's performance. In this paper, we systematically investigate the electrical parameters and the time-dependent dielectric breakdown(TDDB) characteristics of positive channel metal oxide semiconductor(PMOS) under different MDMA process conditions, including the deposition/annealing(D&A) cycles, the D&A time, and the total annealing time. The results show that the increases of the number of D&A cycles(from 1 to 2) and D&A time(from 15 s to 30 s) can contribute to the results that the gate leakage current decreases by about one order of magnitude and that the time to fail(TTF) at 63.2% increases by about several times. However, too many D&A cycles(such as 4 cycles) make the equivalent oxide thickness(EOT) increase by about 1 ?A and the TTF of PMOS worsen. Moreover, different D&A times and numbers of D&A cycles induce different breakdown mechanisms.

Series resistance effect on time zero dielectrics breakdown characteristics of MOSCAP with ultra-thin EOT high-k/metal gate stacks

The time zero dielectric breakdown characteristics of MOSCAP with ultra-thin EOT high-k metal gate stacks are studied. The TZDB results show an abnormal area dependence due to the series resistance effect. The series resistance components extracted from the Fowler–Nordheim tunneling relation are attributed to the spreading resistance due to the asymmetry electrodes. Based on a series model to eliminate the series resistance effect, an area acceleration dependence is obtained by correcting the TZDB results. The area dependence follows Poisson area scaling rules, which indicates that the mechanism of TZDB is the same as TDDB and could be considered as a trap generation process.