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应用于DSRC系统的5.8GHz CMOS LNA设计 被引量:3
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作者 艾学松 孙玲 施佺 《电路与系统学报》 CSCD 北大核心 2012年第3期134-138,共5页
基于TSMC 0.18μm CMOS RF工艺,完成了一个全集成共源-共栅低噪声放大器设计。版图后仿真结果表明:1.8V电源电压下,电路静态功耗约为17mW;在DSRC系统工作频段上,电路实现了良好的综合性能指标,输入反射系数(S11)和输出反射系数(S22)小于... 基于TSMC 0.18μm CMOS RF工艺,完成了一个全集成共源-共栅低噪声放大器设计。版图后仿真结果表明:1.8V电源电压下,电路静态功耗约为17mW;在DSRC系统工作频段上,电路实现了良好的综合性能指标,输入反射系数(S11)和输出反射系数(S22)小于-15dB,增益(S21)大于14.0dB,反向隔离度(S12)达到32dB,噪声系数小于2dB,并且工作稳定。 展开更多
关键词 低噪声放大器 噪声系数 交通专用短程通信:不停车收费
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OPTIMIZATION DESIGN METHOD FOR INPUT IMPEDANCE MATCHING NETWORK OF LOW NOISE AMPLIFIER 被引量:1
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作者 孙玲 吴先智 艾学松 《Transactions of Nanjing University of Aeronautics and Astronautics》 EI 2011年第4期379-384,共6页
According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier (LNA) is proposed based on the input reflection coefficient S11.... According to the theories of optimal noise match and optimal power match, a method for calculating the optimal source impedance of low noise amplifier (LNA) is proposed based on the input reflection coefficient S11. Moreover.with the help of Smith chart, the calculation process is detailed, and the trade-off between the lowest noise figure and the maximum power gain is obtained during the design of LNA input impedance matching network. Based on the Chart 0. 35-μm CMOS process, a traditional cascode LNA circuit is designed and manufactured. Simulation and experimental results have a good agreement with the theoretical analysis, thus proving the correctness of theoretical analysis and the feasibility of the method. 展开更多
关键词 low noise amplifier power match noise match Smith chart
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