In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and ...In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and corresponding P-type planar and trench metal-oxide-semiconductor(MOS) capacitors are fabricated and characterized.Compared with planar MOSFEF,the trench MOSFET shows hardly larger ΔV_(th,sub) in wide temperature range from 25 0 C to 300 0 C.When operating temperature range is from 25 ℃ to 300 ℃,the off-state negative V_(gs) of planar and trench MOSFETs should be safely above-4 V and-2 V,respectively,to alleviate the effect of ΔV_(th,sub) on the normal operation.With the help of P-type planar and trench MOS capacitors,it is confirmed that the obvious ΔV_(th,sub) of 4 H-SiC MOSFET originates from the high density of the hole interface traps between intrinsic Fermi energy level(E_(i)) and valence band(E_(v)).The maximumΔV_(th,sub) of trench MOSFET is about twelve times larger than that of planar MOSFET,owing to higher density of interface states(D_(it)) between E_(i) and E_(v).These research results will be very helpful for the application of 4 H-SiC MOSFET and the improvement of ΔV_(th,sub) of 4 H-SiC MOSFET,especially in 4 H-SiC trench MOSFET.展开更多
基金Project supported by the National Key Research and Development Program of China(Grant No.2017YFB0903203)the National Natural Science Foundation of China(Grant No.62004033)China Postdoctoral Science Foundation(Grant No.2020M683287)。
文摘In order to investigate the characteristics and mechanisms of subthreshold voltage hysteresis(ΔV_(th,sub)) of 4 H-SiC metal-oxide-semiconductor field-effect transistors(MOSFETs),4 H-SiC planar and trench MOSFETs and corresponding P-type planar and trench metal-oxide-semiconductor(MOS) capacitors are fabricated and characterized.Compared with planar MOSFEF,the trench MOSFET shows hardly larger ΔV_(th,sub) in wide temperature range from 25 0 C to 300 0 C.When operating temperature range is from 25 ℃ to 300 ℃,the off-state negative V_(gs) of planar and trench MOSFETs should be safely above-4 V and-2 V,respectively,to alleviate the effect of ΔV_(th,sub) on the normal operation.With the help of P-type planar and trench MOS capacitors,it is confirmed that the obvious ΔV_(th,sub) of 4 H-SiC MOSFET originates from the high density of the hole interface traps between intrinsic Fermi energy level(E_(i)) and valence band(E_(v)).The maximumΔV_(th,sub) of trench MOSFET is about twelve times larger than that of planar MOSFET,owing to higher density of interface states(D_(it)) between E_(i) and E_(v).These research results will be very helpful for the application of 4 H-SiC MOSFET and the improvement of ΔV_(th,sub) of 4 H-SiC MOSFET,especially in 4 H-SiC trench MOSFET.
