A novel planar vertical double-diffused metal-oxide-semiconductor （VDMOS） structure with an ultra-low specific on-resistance （Ron,sp）, whose distinctive feature is the use of inhomogeneous floating p-islands in th...A novel planar vertical double-diffused metal-oxide-semiconductor （VDMOS） structure with an ultra-low specific on-resistance （Ron,sp）, whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region, is proposed. The theoretical limit of its Ron,sp is deduced, the influence of structure parameters on the breakdown voltage （BV） and Ron,sp are investigated, and the optimized results with BV of 83 V and Ron,sp of 54 mΩ.mm2 are obtained. Simulations show that the inhomogeneous-floating-islands metal-oxide-semiconductor field-effect transistor （MOSFET） has a superior ＂Ron,sp/BV＂ trade-off to the conventional VDMOS （a 38% reduction of Ron,sp with the same BV） and the homogeneous-floating-islands MOSFET （a 10% reduction of Ron,sp with the same BV）. The inhomogeneous-floatingislands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET. Its reverse recovery peak current, reverse recovery time and reverse recovery charge are about 50, 80 and 40% of those of the superjunction MOSFET, respectively.展开更多
The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island ...The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P＋ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N＋ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional （2D） numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclanlped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.展开更多
基金Project supported by the National Key Scientific and Technological Project (Grant No. 2011ZX02503-005)the Fundamental Research Funds for the Central Universities (Grant No. ZYGX2010J038)
文摘A novel planar vertical double-diffused metal-oxide-semiconductor （VDMOS） structure with an ultra-low specific on-resistance （Ron,sp）, whose distinctive feature is the use of inhomogeneous floating p-islands in the n-drift region, is proposed. The theoretical limit of its Ron,sp is deduced, the influence of structure parameters on the breakdown voltage （BV） and Ron,sp are investigated, and the optimized results with BV of 83 V and Ron,sp of 54 mΩ.mm2 are obtained. Simulations show that the inhomogeneous-floating-islands metal-oxide-semiconductor field-effect transistor （MOSFET） has a superior ＂Ron,sp/BV＂ trade-off to the conventional VDMOS （a 38% reduction of Ron,sp with the same BV） and the homogeneous-floating-islands MOSFET （a 10% reduction of Ron,sp with the same BV）. The inhomogeneous-floatingislands MOSFET also has a much better body-diode characteristic than the superjunction MOSFET. Its reverse recovery peak current, reverse recovery time and reverse recovery charge are about 50, 80 and 40% of those of the superjunction MOSFET, respectively.
基金supported by the National Key Scientific and Technological Project (Grant No. 2011ZX02503-005)the Fundamental Research Funds for the Central Universities, China (Grant No. ZYGX2010J038)the Specialized Research Fund for the Doctoral Program of Higher Education of China (Grant No. 20110185120005)
文摘The ruggedness of a superjunction metal-oxide semiconductor field-effect transistor （MOSFET） under unclamped inductive switching conditions is improved by optimizing the avalanche current path. Inserting a P-island with relatively high doping concentration into the P-column, the avalanche breakdown point is localized. In addition, a trench type P＋ contact is designed to shorten the current path. As a consequence, the avalanche current path is located away from the N＋ source/P-body junction and the activation of the parasitic transistor can be effectively avoided. To verify the proposed structural mechanism, a two-dimensional （2D） numerical simulation is performed to describe its static and on-state avalanche behaviours, and a method of mixed-mode device and circuit simulation is used to predict its performances under realistic unclanlped inductive switching. Simulation shows that the proposed structure can endure a remarkably higher avalanche energy compared with a conventional superjunction MOSFET.
