The removal of Cr(Ⅵ) through polymeric supported liquid membrane by using calix[4]arene as a carrier

In this work, the transport and removal of Cr(Ⅵ) were achieved through supported liquid membrane(SLM) by using a 5,17, di-tert-butyl-11,23-bis[(1,4-dioxa-8-azaspiro [4,5]decanyl)methyl]-25,26,27,28-tetrahydroxy calix[4]arene carrier, dissolved in 2-nitrophenyl octyl ether dichloromethane.The studied parameters are the solvent effect in the membrane phase, the effect of carrier concentration, and the acid type in the donor phase.The Celgard 2500 was used as a membrane support.We used the Danesi mass transfer model to calculate the permeability coefficients for each studied parameter.In addition, AFM and SEM techniques were used to characterize the surface morphology of the prepared Celgard 2500 membrane that included the calix[4]arene carrier.

Frequency and voltage-dependent electrical and dielectric properties of Al/Co-doped PVA/p-Si structures at room temperature

In order to investigate of cobalt-doped interracial polyvinyl alcohol （PVA） layer and interface trap （Dit） effects, A1/p- Si Schottky barrier diodes （SBDs） are fabricated, and their electrical and dielectric properties are investigated at room temperature. The forward and reverse admittance measurements are carded out in the frequency and voltage ranges of 30 kHz-300 kHz and -5 V-6 V, respectively. C-V or er-V plots exhibit two distinct peaks corresponding to inversion and accumulation regions. The first peak is attributed to the existence of Dit, the other to the series resistance （Rs）, and interfacial layer. Both the real and imaginary parts of dielectric constant （er and err） and electric modulus （Mr and Mrr）, loss tangent （tan~）, and AC electrical conductivity （aac） are investigated, each as a function of frequency and applied bias voltage. Each of the M~ versus V and Mrr versus V plots shows a peak and the magnitude of peak increases with the increasing of frequency. Especially due to the Dit and interfacial PVA layer, both capacitance （C） and conductance （G/w） values are strongly affected, which consequently contributes to deviation from both the electrical and dielectric properties of A1/Co-doped PVA/p-Si （MPS） type SBD. In addition, the voltage-dependent profile of Dit is obtained from the low-high frequency capacitance （CLF-CHF） method.

Illumination and Voltage Dependence of Electrical Characteristics of Au/0.03 Graphene-Doped PVA/n-Si Structures via Capacitance/Conductance-Voltage Measurements

Au/n-Si （MS） structures with a high dielectric interlayer （0.03 graphene-doped PVA） are fabricated to investigate the illumination and voltage effects on electrical and dielectric properties by using capacitance-voltage （C-V） and conductance-voltage （G/w-V） measurements at room temperature and at 1 MHz. Some of the main electrical parameters such as concentration of doping atoms （ND）, barrier height （ ФB（ C - V） ）, depletion layer width （WD） and series resistance （Rs） show fairly large illumination dispersion. The voltage-dependent profile of surface states （Nss） and resistance of the structure （Ri ） are also obtained by using the dark-illumination capacitance （Cdark- Cm） and Nicollian-Brews methods, respectively, For a clear observation of changes in electrical parameters with illumination, the values of ND, WD, ФB（O- V） and Rs are drawn as a function of illumination intensity. The values of ND and WD change almost linearly with illumination intensity. On the other hand, Rs decreases almost exponentially with increasing illumination intensity whereas ФB（C - V） increases. The experimental results suggest that the use of a high dielectric interlayer （0.03 graphene-doped PVA） considerably passivates or reduces the magnitude of the surface states. The large change or dispersion in main electrical parameters can be attributed to generation of electron-hole pairs in the junction under illumination and to a good light absorption. All of these experimental results confirm that the fabricated Au/0.03 graphene-doped PVA/n-Si structure can be used as a photodiode or a capacitor in optoelectronic applications.

On the Voltage and Frequency Distribution of Dielectric Properties and ac Electrical Conductivity in Al/SiO_(2)/p-Si (MOS) Capacitors

An Al/SiO_(2)/p-Si(MOS)capacitor with a thick(826Å)interfacial oxide layer(SiO_(2))which is formed by using the thermal oxidation method is fabricated to investigate both frequency and applied bias voltage dependences of real and imaginary parts of dielectric constant(ϵ'andϵ")and electric modulus(M'and M"),loss tangent(tanδ)and ac electrical conductivity(σ_(ac))in a wide frequency range from 1 kHz to 1 MHz at room temperature.The dielectric properties of the MOS capacitor are obtained using the forward and reverse bias capacitance-voltage(C–V)and conductance-voltage(G/ω–V)measurements in the applied bias voltage range 1.4–5.6 V.The values ofϵ',ϵ",tanδ,M',M"and σ_(ac) are found to be strong functions of frequency and applied bias voltage in the depletion region due to excess capacitance Cex and conductance G_(ex)/ω especially at low frequencies.The experimental results show that the interfacial polarization can occur at low frequencies more easily,consequently contributing to the dispersion inϵ',ϵ",tanδ,M',M"and σ_(ac) values of the MOS capacitor.The other reason for dispersion in the dielectric properties may be attributed to a particular density distribution of interface states(Nss)localized at the Si/SiO_(2) interface,as well as space charge carriers and inhomogeneity of interfacial oxide layer.The increase in conductivity with increasing frequency can be attributed to the hopping type conduction mechanism.It can be concluded that theϵ',ϵ",tanδ,M',M"and σ_(ac) values of the Al/SiO_(2)/p-Si(MOS)capacitor are strongly dependent on both the frequency and applied bias voltage especially in the depletion region.