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Logical Function Decomposition Method for Synthesis of Digital Logical System Implemented with Programmable Logic Devices (PLD)
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作者 Mihai Grigore Timis Alexandru Valachi +1 位作者 Alexandru Barleanu andrei stan 《Circuits and Systems》 2013年第7期472-477,共6页
The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix cal... The paper consists in the use of some logical functions decomposition algorithms with application in the implementation of classical circuits like SSI, MSI and PLD. The decomposition methods use the Boolean matrix calculation. It is calculated the implementation costs emphasizing the most economical solutions. One important aspect of serial decomposition is the task of selecting “best candidate” variables for the G function. Decomposition is essentially a process of substituting two or more input variables with a lesser number of new variables. This substitutes results in the reduction of the number of rows in the truth table. Hence, we look for variables which are most likely to reduce the number of rows in the truth table as a result of decomposition. Let us consider an input variable purposely avoiding all inter-relationships among the input variables. The only available parameter to evaluate its activity is the number of “l”s or “O”s that it has in the truth table. If the variable has only “1” s or “0” s, it is the “best candidate” for decomposition, as it is practically redundant. 展开更多
关键词 Combinational CIRCUITS Static HAZARD LOGIC Design BOOLEAN Functions Logical DECOMPOSITIONS
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Two Analytical Methods for Detection and Elimination of the Static Hazard in Combinational Logic Circuits
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作者 Mihai Grigore Timis Alexandru Valachi +1 位作者 Alexandru Barleanu andrei stan 《Circuits and Systems》 2013年第7期466-471,共6页
In this paper, the authors continue the researches described in [1], that consists in a comparative study of two methods to eliminate the static hazard from logical functions, by using the form of Product of Sums (POS... In this paper, the authors continue the researches described in [1], that consists in a comparative study of two methods to eliminate the static hazard from logical functions, by using the form of Product of Sums (POS), static hazard “0”. In the first method, it used the consensus theorem to determine the cover term that is equal with the product of the two residual implicants, and in the second method it resolved a Boolean equation system. The authors observed that in the second method the digital hazard can be earlier detected. If the Boolean equation system is incompatible (doesn’t have solutions), the considered logical function doesn’t have the static 1 hazard regarding the coupled variable. Using the logical computations, this method permits to determine the needed transitions to eliminate the digital hazard. 展开更多
关键词 Combinational CIRCUITS STATIC HAZARD LOGIC Design BOOLEAN Functions
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