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An Ultra Low-Voltage and Low-Power OTA Using Bulk-Input Technique and Its Application in Active-RC Filters
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作者 arash ahmadpour 《Circuits and Systems》 2011年第3期183-189,共7页
This paper presents the design of a two-stage bulk-input pseudo-differential operational transconductance amplifier (OTA) and its application in active-RC filters. The OTA was designed in 90 nm CMOS process and operat... This paper presents the design of a two-stage bulk-input pseudo-differential operational transconductance amplifier (OTA) and its application in active-RC filters. The OTA was designed in 90 nm CMOS process and operates at a single supply voltage of 0.5 V. Using a two-path bulk-driven OTA by the combination of two different amplifiers the DC gain and speed of the OTA is increased. Rail-to-rail input is made possible using the transistor’s bulk terminal as in input. Also a Miller-Feed-forward (MFF) compensation is utilized which is improved the gain bandwidth (GBW) and phase margin of the OTA. In addition, a new merged cross-coupled self-cascode pair is used that can provide higher gain. Also, a novel cost-effective bulk-input common-mode feedback (CMFB) circuit has been designed. Simplicity and ability of using this new merged CMFB circuit is superior compared with state-of-the-art CMFBs. The OTA has a 70.2 dB DC gain, a 2.5 MHz GBW and a 70.8o phase margin for a 20 PF capacitive load whereas consumes only 25 μw. Finally, an 8th order Butterworth active Biquadrate RC filter has been designed and this OTA was checked by a typical switched-capacitor (SC) integrator with a 1 MHz clock-frequency. 展开更多
关键词 Operational TRANSCONDUCTANCE Amplifier (OTA) Common-Mode Feedback (CMFB) Bulk-Input SWITCHED-CAPACITOR (SC) INTEGRATOR Miller-Feed-Forward (MFF)
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An Enhanced Bulk-Driven Folded-Cascode Amplifier in 0.18 µm CMOS Technology
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作者 arash ahmadpour Pooya Torkzadeh 《Circuits and Systems》 2012年第2期187-191,共5页
A new configuration of Bulk-Driven Folded-Cascode (BDFC) amplifier is presented in this paper. Due to this modifying, significant improvement in differential DC-Gain (more than 11 dB) is achieved in compare to the con... A new configuration of Bulk-Driven Folded-Cascode (BDFC) amplifier is presented in this paper. Due to this modifying, significant improvement in differential DC-Gain (more than 11 dB) is achieved in compare to the conventional structure. Settling behavior of proposed amplifier is also improved and accuracy more than 8 bit for 500 mV voltage swing is obtained. Simulation results using HSPICE Environment are included which validate the theoretical analysis. The amplifier is designed using standard 0.18 μm CMOS triple-well (level 49) process with supply voltage of 1.2 V. The correct functionality of this configuration is verified from –50℃ to 100℃. 展开更多
关键词 BULK-DRIVEN FOLDED-CASCODE (BDFC) AMPLIFIER DC-Gain BULK-DRIVEN (BD) FOLDED-CASCODE (FC) CMOS
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